Abstract: A semiconductor device includes a plurality of insulating layers, a plurality of conductive layers that are formed alternately with the plurality of insulating layers, an interlayer film, and a channel. The interlayer film is different from the conductive layer, has a crystal structure of a hexagonal crystal system, and is formed between at least one of the insulating layers and at least one of the conductive layers. The channel penetrates through the plurality of conductive layers, the interlayer film, and the plurality of insulating layers.

Abstract: According to one embodiment, a semiconductor storage device includes a memory pillar extending in a first direction. The memory pillar includes a tunnel insulation film, a charge storage layer on the tunnel insulation film, and a first block insulation film on the charge storage layer. A conductor layer extends in a second direction intersecting the first direction to meet a portion of the memory pillar. The conductor layer includes a first layer comprising molybdenum and a second layer comprising tungsten. The first layer is between the memory pillar and the second layer in the second direction.

Abstract: A semiconductor device that can have an improved data retention characteristic is provided. A semiconductor device includes a stacked body and a memory pillar formed in a memory hole of the stacked body. The memory pillar has a structure in which a semiconductor portion 61b, a tunnel insulating film 62a, and a charge storage layer 62b are sequentially stacked. A block insulating film 53 is provided between the charge storage layer 62b and a conductive layer 52. The conductive layer 52 contains molybdenum. The block insulating film 53 includes a silicon oxide film 53a and an aluminum oxide film 53b. A region from the conductive layer 52 to the aluminum oxide film 53b contains chlorine, which prevents OH diffusion. The concentration of chlorine at a second portion closer to the aluminum oxide film 53b than a first portion in the conductive layer 52 is higher than the concentration of impurities at the first portion in the conductive layer.

Abstract: In a manufacturing method of a semiconductor device according to one embodiment, a first gas containing a first metal element is introduced into a chamber having a substrate housed therein. Next, the first gas is discharged from the chamber using a purge gas. Subsequently, a second gas reducing the first gas is introduced into the chamber. Next, the second gas is discharged from the chamber using the purge gas. Further, a third gas different from the first gas, the second gas, and the purge gas is introduced into the chamber at least either at a time of discharging the first gas or at a time of discharging the second gas.

Abstract: In a manufacturing method of a semiconductor device according to one embodiment, a first gas containing a first metal element is introduced into a chamber having a substrate housed therein. Next, the first gas is discharged from the chamber using a purge gas. Subsequently, a second gas reducing the first gas is introduced into the chamber. Next, the second gas is discharged from the chamber using the purge gas. Further, a third gas different from the first gas, the second gas, and the purge gas is introduced into the chamber at least either at a time of discharging the first gas or at a time of discharging the second gas.

Abstract: A memory device includes a crystal-including layer including a first metal, and a germanium-and-oxygen including layer contacting the crystal-including layer. At least a portion of the crystal-including layer is crystallized. The germanium-and-oxygen including layer includes germanium and oxygen.

Abstract: In a manufacturing method of a semiconductor device according to one embodiment, a first gas containing a first metal element is introduced into a chamber having a substrate housed therein. Next, the first gas is discharged from the chamber using a purge gas. Subsequently, a second gas reducing the first gas is introduced into the chamber. Next, the second gas is discharged from the chamber using the purge gas. Further, a third gas different from the first gas, the second gas, and the purge gas is introduced into the chamber at least either at a time of discharging the first gas or at a time of discharging the second gas.

Abstract: A memory device includes a crystal-including layer including a first metal, and a germanium-and-oxygen including layer contacting the crystal-including layer. At least a portion of the crystal-including layer is crystallized. The germanium-and-oxygen including layer includes germanium and oxygen.

Abstract: According to one embodiment, an insulating layer is provided above a stairstep portion of a stacked body. A first cover film is provided between the stairstep portion and the insulating layer. The first cover film is of a material different from the insulating layer. A separation portion divides the stacked body and the insulating layer. A second cover film is provided at a side surface of the insulating layer on the separation portion side. The second cover film is of a material different from the insulating layer.

Abstract: According to one embodiment, an insulating layer is provided above a stairstep portion of a stacked body. A first cover film is provided between the stairstep portion and the insulating layer. The first cover film is of a material different from the insulating layer. A separation portion divides the stacked body and the insulating layer. A second cover film is provided at a side surface of the insulating layer on the separation portion side. The second cover film is of a material different from the insulating layer.

Abstract: According to one embodiment, a semiconductor device includes a stacked body, a semiconductor body, and a stacked film. The stacked body includes a plurality of tungsten layers and a plurality of alloy layers of tungsten and molybdenum. At least portions of the tungsten layers are stacked with an air gap interposed. The alloy layers are provided on surfaces of the tungsten layers opposing the air gap. The semiconductor body extends in a stacking direction through the stacked body. The stacked film is provided between the semiconductor body and the tungsten layers. The stacked film includes a charge storage portion.

Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes forming a first metal nitride film on a side surface of a hole extending in a stacking direction in a stacked body. The method includes forming a second metal nitride film on upper and lower surfaces of second layers and a side surface of the first metal nitride film. The method includes forming metal layers in first air gaps inside the second metal nitride film. The method includes removing the second layers and forming second air gaps between the metal layers. The method includes removing the first metal nitride film exposed to the second air gaps and dividing the first metal nitride film in the stacking direction.

Abstract: According to one embodiment, a memory element includes: a first electrode layer; a second electrode layer; and a memory layer provided between the first electrode layer and the second electrode layer, and the memory layer including a plurality of first oxide layers in a second oxide layer, a resistivity of each of the plurality of first oxide layers being higher than a resistivity of the second oxide layer.

Abstract: A resistance change element includes a first conductive layer, a second conductive layer, and a memory layer. The memory layer is provided between the first conductive layer and the second conductive layer. The memory layer is capable of reversibly transitioning between a first state and a second state due to at least one of a voltage and a current supplied via the first conductive layer and the second conductive layer. A resistance of the second state is higher than a resistance of the first state. The memory layer includes niobium oxide. One of a (100) plane, a (010) plane, and a (110) plane of the memory layer is oriented in a stacking direction from the first conductive layer toward the second conductive layer.

Abstract: According to one embodiment, a memory element includes: a first electrode layer; a second electrode layer; and a memory layer provided between the first electrode layer and the second electrode layer, and the memory layer including a plurality of first oxide layers in a second oxide layer, a resistivity of each of the plurality of first oxide layers being higher than a resistivity of the second oxide layer.

Abstract: A resistance change element includes a first conductive layer, a second conductive layer, and a memory layer. The memory layer is provided between the first conductive layer and the second conductive layer. The memory layer is capable of reversibly transitioning between a first state and a second state due to at least one of a voltage and a current supplied via the first conductive layer and the second conductive layer. A resistance of the second state is higher than a resistance of the first state. The memory layer includes niobium oxide. One of a (100) plane, a (010) plane, and a (110) plane of the memory layer is oriented in a stacking direction from the first conductive layer toward the second conductive layer.

Abstract: According to one embodiment, a nano-imprint mold includes plural pairs of first and second protrusions formed on a base layer, each of which is formed along the same straight line. Each protrusion has a top surface and four side surfaces. The first and second protrusions are mirror-symmetrical with each other. A first side surface of the first protrusion and a second side surface of the second protrusion face each other. A first angle between the first side surface or the second side surface and a main surface of the base layer is not less than 85° and not more than 90°. A second angle between a third side surface in the first protrusion or a fourth side surface in the second protrusion and the main surface of the base layer is not less than 70° and not more than 88°. The first angle is larger than the second angle.

Abstract: A method of forming a concave-convex pattern according to an embodiment includes: forming a guide pattern on a base material, the guide pattern having a convex portion; forming a formative layer on the guide pattern, the formative layer including a stacked structure formed by stacking a first layer and a second layer, the first layer including at least one element selected from a first metal element and a metalloid element, the second layer including a second metal element different from the first metal element; selectively leaving the formative layer only at side faces of the convex portions by performing etching on the formative layer; removing the guide pattern; and forming the concave-convex pattern in the base material by performing etching on the base material, with the remaining formative layer being used as a mask.

Abstract: According to one embodiment, a nonvolatile memory device includes a memory cell. The memory cell includes a stacked film structure. The stacked film structure is capable of maintaining a first state or a second state. The first state includes a lower electrode film, a first memory element film provided on the lower electrode film and containing a first oxide and an upper electrode film provided on the first memory element film. The second state includes the lower electrode film, the first memory element film provided on the lower electrode film, a second memory element film provided on the first memory element film and containing a second oxide and the upper electrode film provided on the second memory element film.

Abstract: According to one embodiment, a nano-imprint mold includes plural pairs of first and second protrusions formed on a base layer, each of which is formed along the same straight line. Each protrusion has a top surface and four side surfaces. The first and second protrusions are mirror-symmetrical with each other. A first side surface of the first protrusion and a second side surface of the second protrusion face each other. A first angle between the first side surface or the second side surface and a main surface of the base layer is not less than 85° and not more than 90°. A second angle between a third side surface in the first protrusion or a fourth side surface in the second protrusion and the main surface of the base layer is not less than 70° and not more than 88°. The first angle is larger than the second angle.