Patents by Inventor Tomotaka Higaki

Tomotaka Higaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8765328
    Abstract: An exposure mask used to transfer a pattern defined by exposure onto a wafer, includes: a substrate; a pattern formation region provided on the substrate, and having pattern elements formed therein, the pattern elements having a size not smaller than a resolution limit after being transferred onto the wafer; and a sub-pattern formation region provided on the substrate and having sub-pattern elements formed therein. The sub-pattern element has a size smaller than the resolution limit after being transferred onto the wafer, and the sub-pattern formation region is spaced from the pattern formation region by a distance having no optical proximity effect on the pattern.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: July 1, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tomotaka Higaki
  • Patent number: 8715891
    Abstract: According to one embodiment, a mask used with an exposure apparatus is disclosed. The mask includes a main pattern, and a sub-pattern having a dimension smaller than a resolution limit of the exposure apparatus. The sub-pattern is arranged next to the main pattern. The sub-pattern includes a first sub-pattern arranged next to the main pattern, and second sub-patterns contacting the first sub-pattern and arranged along a longitudinal direction of the first sub-pattern. The sub-patterns satisfy a condition of P??/(NA(1+?0)). Where P is a pitch of the second sub-patterns, NA is a numerical aperture of the exposure apparatus, ? and ?0 are respectively exposure wave length and maximum ? when the main pattern by using the exposure apparatus.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: May 6, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tomotaka Higaki
  • Publication number: 20130137015
    Abstract: According to one embodiment, a mask used with an exposure apparatus is disclosed. The mask includes a main pattern, and a sub-pattern having a dimension smaller than a resolution limit of the exposure apparatus. The sub-pattern is arranged next to the main pattern. The sub-pattern includes a first sub-pattern arranged next to the main pattern, and second sub-patterns contacting the first sub-pattern and arranged along a longitudinal direction of the first sub-pattern. The sub-patterns satisfy a condition of P??/(NA(1+?0)). Where P is a pitch of the second sub-patterns, NA is a numerical aperture of the exposure apparatus, ? and ?0 are respectively exposure wave length and maximum ? when the main pattern by using the exposure apparatus.
    Type: Application
    Filed: September 5, 2012
    Publication date: May 30, 2013
    Inventor: Tomotaka HIGAKI
  • Publication number: 20100304281
    Abstract: An exposure mask used to transfer a pattern defined by exposure onto a wafer, includes: a substrate; a pattern formation region provided on the substrate, and having pattern elements formed therein, the pattern elements having a size not smaller than a resolution limit after being transferred onto the wafer; and a sub-pattern formation region provided on the substrate and having sub-pattern elements formed therein. The sub-pattern element has a size smaller than the resolution limit after being transferred onto the wafer, and the sub-pattern formation region is spaced from the pattern formation region by a distance having no optical proximity effect on the pattern.
    Type: Application
    Filed: March 19, 2010
    Publication date: December 2, 2010
    Inventor: Tomotaka HIGAKI
  • Patent number: 5217834
    Abstract: Method of forming a pattern on a semiconductor wafer, the temperature of the semiconductor wafer being detected by a thermocouple. When the detected temperature is at a specified value which indicates that the deformation of the semiconductor wafer is within an allowable range, a step of forming a pattern on the semiconductor wafer is performed. This forming method improves the accuracy in forming the pattern. Also, in a method of inspecting a pattern on a semiconductor wafer, the temperature of the semiconductor wafer is detected using a thermocouple. When the detected temperature is at a specified value which indicates that the deformation of the semiconductor wafer is within an allowable range, a step of inspecting a pattern on the semiconductor wafer is performed. This inspecting method improves the accuracy in inspecting the pattern.
    Type: Grant
    Filed: August 13, 1991
    Date of Patent: June 8, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tomotaka Higaki