Patents by Inventor Tomotaka Tabuchi

Tomotaka Tabuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240058918
    Abstract: A chuck table manufacturing method capable of changing over the shape of a holding surface according to at least two workpieces different in area or shape includes a porous plate sticking step of sticking a frame body and a porous plate to each other while the porous plate is accommodated in a recess of the frame body with an upper surface of the porous plate being exposed, a groove forming step of forming, in the porous plate, a groove reaching a bottom surface of the recess, and a resin filling step of filling the groove with a liquid resin and curing the liquid resin.
    Type: Application
    Filed: August 2, 2023
    Publication date: February 22, 2024
    Inventors: Junsoo WOO, Tomotaka TABUCHI
  • Patent number: 11056346
    Abstract: There is provided a wafer processing method for reducing a thickness of a wafer. The wafer has a front side and a back side opposite to the front side. The wafer has a device area where a plurality of devices are formed on the front side and a peripheral marginal area including a curved peripheral edge. A protective layer for covering the plural devices are formed on the front side in the device area. The wafer processing method includes a plasma etching step of supplying an etching gas in a plasma condition to the front side of the wafer by using the protective layer as a mask, thereby removing the peripheral marginal area including the curved peripheral edge, a protective member attaching step of attaching a protective member to the front side of the wafer, and a grinding step of grinding the back side of the wafer.
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: July 6, 2021
    Assignee: DISCO CORPORATION
    Inventors: Hideyuki Sandoh, Ichiro Yamahata, Tomotaka Tabuchi
  • Publication number: 20210057225
    Abstract: There is provided a wafer processing method for reducing a thickness of a wafer. The wafer has a front side and a back side opposite to the front side. The wafer has a device area where a plurality of devices are formed on the front side and a peripheral marginal area including a curved peripheral edge. A protective layer for covering the plural devices are formed on the front side in the device area. The wafer processing method includes a plasma etching step of supplying an etching gas in a plasma condition to the front side of the wafer by using the protective layer as a mask, thereby removing the peripheral marginal area including the curved peripheral edge, a protective member attaching step of attaching a protective member to the front side of the wafer, and a grinding step of grinding the back side of the wafer.
    Type: Application
    Filed: August 21, 2020
    Publication date: February 25, 2021
    Inventors: Hideyuki SANDOH, Ichiro YAMAHATA, Tomotaka TABUCHI
  • Publication number: 20200391337
    Abstract: A grinding apparatus includes a first chuck table that has a porous holding surface corresponding to a first wafer and holds the first wafer, a second chuck table that has a porous holding surface corresponding to a second wafer different from the first wafer in size or shape and holds the second wafer, and a grinding unit that grinds, by a grinding wheel, the first wafer sucked and held by the first chuck table positioned at the grinding position or the second wafer sucked and held by the second chuck table positioned at the grinding position.
    Type: Application
    Filed: June 9, 2020
    Publication date: December 17, 2020
    Inventors: Tomotaka TABUCHI, Yuannan LI, Kazuma SEKIYA
  • Patent number: 10692721
    Abstract: Disclosed herein is a wafer processing method including a protective film forming step of forming a protective film with which the whole of a surface of a wafer is coated, a laser beam irradiation step of irradiating the wafer with a laser beam along streets to remove a functional layer and expose a substrate, a protective film detecting step of detecting the coating state of the protective film in plural device regions over the wafer after the laser beam irradiation, a protective film re-forming step of forming the protective film again in such a manner that the protective film covers each device region if a part that is not coated with the protective film exists in the device regions, a plasma irradiation step of carrying out plasma irradiation for the wafer, and a dividing step of dividing the wafer by cutting along the streets.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: June 23, 2020
    Assignee: DISCO CORPORATION
    Inventors: Tomotaka Tabuchi, Lynne Tseng
  • Patent number: 10468303
    Abstract: A device chip manufacturing method includes a passivation film removing step of removing a passivation film along each division line, a wafer dividing step of performing plasma etching using a fluorine-based gas to the front side of a wafer in the condition where the passivation film is used as a mask, thereby dividing the wafer along the division lines, and a die attach film removing step of performing plasma etching using an oxygen-based gas to the front side of the wafer in the condition where the passivation film is used as a mask, thereby removing a part or the whole of a die attach film along each division line.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: November 5, 2019
    Assignee: DISCO CORPORATION
    Inventor: Tomotaka Tabuchi
  • Patent number: 10354919
    Abstract: A method for dividing a wafer having a wiring layer including Cu on the front side, the front side of the wafer being partitioned by a plurality of crossing division lines to define a plurality of separate regions where a plurality of devices are formed. The method includes a laser processed groove forming step of applying a laser beam to the wiring layer along each division line to thereby remove the wiring layer along each division line and form a laser processed groove along each division line, a cutting step of using a cutting blade having a thickness smaller than the width of each laser processed groove to fully cut the wafer along each laser processed groove after performing the laser processed groove forming step, and a dry etching step of dry-etching at least each laser processed groove after performing the laser processed groove forming step.
    Type: Grant
    Filed: November 10, 2016
    Date of Patent: July 16, 2019
    Assignee: DISCO CORPORATION
    Inventors: Tomotaka Tabuchi, Kentaro Odanaka, Satoshi Kumazawa, Senichi Ryo, Yuki Ogawa
  • Publication number: 20180330957
    Abstract: Disclosed herein is a workpiece processing method including a mask preparing step of preparing a mask that covers devices on a front surface of a workpiece and exposes streets, a plasma etching step of repeating an operation of supplying plasmatized SF6 through the mask to the workpiece accompanied by a holding member disposed on a back surface thereof, to form grooves, then supplying plasmatized C4F8 to the workpiece through the mask to deposit a coating on the workpiece, and thereafter supplying plasmatized SF6 to the workpiece through the mask to remove the coating present at bottoms of the grooves, thereby etching the groove bottoms, and a foreign matter removing step of cleaning the workpiece with a cleaning liquid, after the plasma etching step is conducted, to remove the coating produced in the plasma etching step.
    Type: Application
    Filed: May 8, 2018
    Publication date: November 15, 2018
    Inventors: Frank Wei, Tomotaka Tabuchi, Hideyuki Sandoh
  • Patent number: 10115636
    Abstract: A workpiece has a plurality of low-dielectric-constant insulation films and a metallic pattern stacked on a surface of a semiconductor substrate. Devices are formed in a plurality of regions partitioned by streets formed in a grid pattern. Surfaces of the devices formed on the workpiece are covered with a surface protective member, leaving the streets exposed. A dispersion of abrasive grains in an etching liquid capable of dissolving the metallic pattern is blasted against the workpiece together with compressed gas so as to remove the low-dielectric-constant insulation films and the metallic pattern on the streets, thereby exposing the semiconductor substrate. The workpiece is divided with the semiconductor substrate exposed by the wet blasting step subjected to dry etching so as to divide the workpiece along the streets.
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: October 30, 2018
    Assignee: Disco Corporation
    Inventors: Yoshiteru Nishida, Tomotaka Tabuchi, Hiroyuki Takahashi, Susumu Yokoo, Kenji Okazaki
  • Publication number: 20180308755
    Abstract: A device chip manufacturing method includes a passivation film removing step of removing a passivation film along each division line, a wafer dividing step of performing plasma etching using a fluorine-based gas to the front side of a wafer in the condition where the passivation film is used as a mask, thereby dividing the wafer along the division lines, and a die attach film removing step of performing plasma etching using an oxygen-based gas to the front side of the wafer in the condition where the passivation film is used as a mask, thereby removing a part or the whole of a die attach film along each division line.
    Type: Application
    Filed: April 18, 2018
    Publication date: October 25, 2018
    Inventor: Tomotaka Tabuchi
  • Publication number: 20180166282
    Abstract: Disclosed herein is a wafer processing method including a protective film forming step of forming a protective film with which the whole of a surface of a wafer is coated, a laser beam irradiation step of irradiating the wafer with a laser beam along streets to remove a functional layer and expose a substrate, a protective film detecting step of detecting the coating state of the protective film in plural device regions over the wafer after the laser beam irradiation, a protective film re-forming step of forming the protective film again in such a manner that the protective film covers each device region if a part that is not coated with the protective film exists in the device regions, a plasma irradiation step of carrying out plasma irradiation for the wafer, and a dividing step of dividing the wafer by cutting along the streets.
    Type: Application
    Filed: December 12, 2017
    Publication date: June 14, 2018
    Inventors: Tomotaka Tabuchi, Lynne Tseng
  • Publication number: 20170140989
    Abstract: A method for dividing a wafer having a wiring layer including Cu on the front side, the front side of the wafer being partitioned by a plurality of crossing division lines to define a plurality of separate regions where a plurality of devices are formed. The method includes a laser processed groove forming step of applying a laser beam to the wiring layer along each division line to thereby remove the wiring layer along each division line and form a laser processed groove along each division line, a cutting step of using a cutting blade having a thickness smaller than the width of each laser processed groove to fully cut the wafer along each laser processed groove after performing the laser processed groove forming step, and a dry etching step of dry-etching at least each laser processed groove after performing the laser processed groove forming step.
    Type: Application
    Filed: November 10, 2016
    Publication date: May 18, 2017
    Inventors: Tomotaka Tabuchi, Kentaro Odanaka, Satoshi Kumazawa, Senichi Ryo, Yuki Ogawa
  • Patent number: 9330976
    Abstract: A wafer processing method includes forming a resist film on the front side of a wafer in an area except division lines, plasma etching the wafer to form a groove on the front side of the wafer along each division line, the groove having a depth greater than a finished thickness, removing the resist film from the front side of the wafer by cleaning, and grinding the back side of the wafer to reduce the thickness of the wafer to the finished thickness, so that the groove is exposed to the back side of the wafer to thereby divide the wafer into individual device chips. In the resist film removing step, a chemical fluid is sprayed to the resist film formed on the front side of the wafer, thereby removing the resist film.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: May 3, 2016
    Assignee: Disco Corporation
    Inventors: Susumu Yakoo, Hiroyuki Takahashi, Kenji Okazaki, Yoshiteru Nishida, Tomotaka Tabuchi
  • Publication number: 20160042962
    Abstract: A workpiece has a plurality of low-dielectric-constant insulation films and a metallic pattern stacked on a surface of a semiconductor substrate. Devices are formed in a plurality of regions partitioned by streets formed in a grid pattern. Surfaces of the devices formed on the workpiece are covered with a surface protective member, leaving the streets exposed. A dispersion of abrasive grains in an etching liquid capable of dissolving the metallic pattern is blasted against the workpiece together with compressed gas so as to remove the low-dielectric-constant insulation films and the metallic pattern on the streets, thereby exposing the semiconductor substrate. The workpiece is divided with the semiconductor substrate exposed by the wet blasting step subjected to dry etching so as to divide the workpiece along the streets.
    Type: Application
    Filed: August 7, 2015
    Publication date: February 11, 2016
    Inventors: Yoshiteru Nishida, Tomotaka Tabuchi, Hiroyuki Takahashi, Susumu Yokoo, Kenji Okazaki
  • Publication number: 20160042996
    Abstract: A wafer processing method includes forming a resist film on the front side of a wafer in an area except division lines, plasma etching the wafer to form a groove on the front side of the wafer along each division line, the groove having a depth greater than a finished thickness, removing the resist film from the front side of the wafer by cleaning, and grinding the back side of the wafer to reduce the thickness of the wafer to the finished thickness, so that the groove is exposed to the back side of the wafer to thereby divide the wafer into individual device chips. In the resist film removing step, a chemical fluid is sprayed to the resist film formed on the front side of the wafer, thereby removing the resist film.
    Type: Application
    Filed: August 4, 2015
    Publication date: February 11, 2016
    Inventors: Susumu Yakoo, Hiroyuki Takahashi, Kenji Okazaki, Yoshiteru Nishida, Tomotaka Tabuchi
  • Patent number: 9123797
    Abstract: A wafer processing method for dividing a wafer into individual devices along a plurality of crossing division lines, including a frame preparing step of preparing a frame having a plurality of crossing partitions corresponding to the division lines of the wafer, a resin covering step of spreading a resin powder on the wafer and positioning the partitions of the frame in alignment with the division lines, thereby covering with the resin powder the regions of the wafer other than the regions corresponding to the division lines, a masking step of melting and curing the resin powder supplied to the wafer processed by the resin covering step and next removing the frame, thereby masking the regions other than the regions corresponding to the division lines, and an etching step of plasma-etching the wafer processed by the masking step to thereby divide the wafer into the individual devices along the division lines.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: September 1, 2015
    Assignee: Disco Corporation
    Inventors: Kazuma Sekiya, Tomotaka Tabuchi
  • Patent number: 9112019
    Abstract: A wafer processing method for dividing a wafer into individual devices along a plurality of crossing division lines includes preparing a frame having a plurality of crossing partitions corresponding to the division lines of the wafer, spreading a liquid resin on the front side or back side of the wafer and positioning the partitions of the frame in alignment with the division lines of the wafer, thereby covering with the liquid resin the regions on the front side or back side of the wafer other than the regions corresponding to the division lines, curing the liquid resin supplied to the front side or back side of the wafer and next removing the frame, thereby masking the regions other than the regions corresponding to the division lines, and plasma-etching the wafer processed by the masking to thereby divide the wafer into the individual devices along the division lines.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: August 18, 2015
    Assignee: Disco Corporation
    Inventors: Kazuma Sekiya, Tomotaka Tabuchi
  • Publication number: 20150147870
    Abstract: A wafer processing method for dividing a wafer into individual devices along a plurality of crossing division lines includes preparing a frame having a plurality of crossing partitions corresponding to the division lines of the wafer, spreading a liquid resin on the front side or back side of the wafer and positioning the partitions of the frame in alignment with the division lines of the wafer, thereby covering with the liquid resin the regions on the front side or back side of the wafer other than the regions corresponding to the division lines, curing the liquid resin supplied to the front side or back side of the wafer and next removing the frame, thereby masking the regions other than the regions corresponding to the division lines, and plasma-etching the wafer processed by the masking to thereby divide the wafer into the individual devices along the division lines.
    Type: Application
    Filed: November 21, 2014
    Publication date: May 28, 2015
    Inventors: Kazuma Sekiya, Tomotaka Tabuchi
  • Publication number: 20150140784
    Abstract: A wafer processing method for dividing a wafer into individual devices along a plurality of crossing division lines, including a frame preparing step of preparing a frame having a plurality of crossing partitions corresponding to the division lines of the wafer, a resin covering step of spreading a resin powder on the wafer and positioning the partitions of the frame in alignment with the division lines, thereby covering with the resin powder the regions of the wafer other than the regions corresponding to the division lines, a masking step of melting and curing the resin powder supplied to the wafer processed by the resin covering step and next removing the frame, thereby masking the regions other than the regions corresponding to the division lines, and an etching step of plasma-etching the wafer processed by the masking step to thereby divide the wafer into the individual devices along the division lines.
    Type: Application
    Filed: November 17, 2014
    Publication date: May 21, 2015
    Inventors: Kazuma Sekiya, Tomotaka Tabuchi
  • Patent number: 6852608
    Abstract: A semiconductor wafer is applied to a support disk via an intervening adhesive layer with the front side of the semiconductor wafer facing the adhesive layer, which is sensitive to a certain exterior factor for reducing its adhesive force; the semiconductor wafer is ground on the rear side; the wafer-and-support combination is applied to a dicing adhesive tape with the so ground rear side facing the dicing adhesive tape, which is surrounded and supported by the circumference by a dicing frame; the certain exterior factor is effected on the intervening adhesive layer to reduce its adhesive force; and the intervening adhesive layer and support disk are removed from the semiconductor wafer or chips without the possibility of damaging the same.
    Type: Grant
    Filed: November 15, 2002
    Date of Patent: February 8, 2005
    Assignee: Disco Corporation
    Inventors: Masahiko Kitamura, Koichi Yajima, Yusuke Kimura, Tomotaka Tabuchi