Patents by Inventor Tomotake Nakamura

Tomotake Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145753
    Abstract: A fuel cell module has a fuel cell stack, an oxidant gas supply plate, a first off-gas flow channel, a first heat-insulating material and a second heat-insulating material. The oxidant gas supply plate flows an oxidant to be supplied to the fuel cell stack. An off-gas discharged from the fuel cell stack flows through the first off-gas flow channel. The fuel cell stack, the oxidant gas supply plate, and the first off-gas flow channel are located in this order in the normal direction of a main surface of the oxidant gas supply plate. The first heat-insulating material is located adjacent to the first off-gas flow channel in the normal direction. The second heat-insulating material is located outside the first heat-insulating material in the normal direction.
    Type: Application
    Filed: February 25, 2022
    Publication date: May 2, 2024
    Inventors: Yoshihide SANO, Tomotake AONO, Ryuichi NAKAMURA, Keita FUTAGAMI
  • Publication number: 20240128486
    Abstract: A fuel cell module has a fuel cell stack and an oxidant gas supply plate. The fuel cell stack is arranged inside a housing. The oxidant gas supply plate is arranged adjacent to the fuel cell stack within the housing. The oxidant gas supply plate has an inner space. The oxidant gas supply plate is positioned separated away from an inner wall of the housing on the first direction side so that a space on the fuel cell stack side communicates with a space on the side opposite to the fuel cell stack side. The oxidant gas supply plate has a surface facing the fuel cell stack and a surface on the opposite side of the fuel cell stack, both being connected directly or indirectly to the housing.
    Type: Application
    Filed: February 25, 2022
    Publication date: April 18, 2024
    Inventors: Yoshihide SANO, Tomotake AONO, Ryuichi NAKAMURA, Keita FUTAGAMI
  • Patent number: 11714650
    Abstract: The present disclosure relates to a non-transitory computer-readable recording medium storing an analysis program that causes a computer to execute a process. The process includes sampling an instruction address of one of instructions included in a program during execution of the program, identifying a first function that includes the sampled instruction address in an address range, rewriting mark information associated with the identified first function, identifying first information corresponding to the instruction address of the first function among a plurality of first information based on the rewritten mark information, identifying second information corresponding to the instruction address of the first function among a plurality of second information based on the rewritten mark information, storing the first information and the second information in a memory, and analyzing performance of the program based on the first information and the second information stored in the memory.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: August 1, 2023
    Assignee: FUJITSU LIMITED
    Inventors: Hiroki Tokura, Masato Nakagawa, Tomotake Nakamura
  • Publication number: 20230040382
    Abstract: The present disclosure relates to a non-transitory computer-readable recording medium storing an analysis program that causes a computer to execute a process. The process includes sampling an instruction address of one of instructions included in a program during execution of the program, identifying a first function that includes the sampled instruction address in an address range, rewriting mark information associated with the identified first function, identifying first information corresponding to the instruction address of the first function among a plurality of first information based on the rewritten mark information, identifying second information corresponding to the instruction address of the first function among a plurality of second information based on the rewritten mark information, storing the first information and the second information in a memory, and analyzing performance of the program based on the first information and the second information stored in the memory.
    Type: Application
    Filed: March 31, 2022
    Publication date: February 9, 2023
    Applicant: FUJITSU LIMITED
    Inventors: Hiroki TOKURA, Masato NAKAGAWA, Tomotake NAKAMURA
  • Patent number: 10534691
    Abstract: An apparatus, for a first loop included in a program code, determines whether an inner loop is included in the first loop. When the inner loop is included in the first loop, the apparatus determines whether a processing code other than the inner loop is included in the first loop. When both the inner loop and the processing code other than the inner loop are included in the first loop or when no inner loop is included in the first loop, the apparatus adds a performance measurement code for conducting performance measurement of the first loop to the program code.
    Type: Grant
    Filed: January 17, 2018
    Date of Patent: January 14, 2020
    Assignee: FUJITSU LIMITED
    Inventor: Tomotake Nakamura
  • Patent number: 10275512
    Abstract: An information processing apparatus includes: a memory configured to store a plurality of structures of a substance whose structure changes and a dimension group, which is a group of index dimensions that are indices for structural analysis of the substance, out of a plurality of dimensions that express the structure of the substance; and a processor configured to perform a procedure including: performing, for each of a plurality of candidate dimensions, which are not included in the dimension group, out of the plurality of dimensions, clustering of a plurality of structures in multidimensional space that has every index dimension included in the dimension group and a candidate dimension as coordinate axes; and adding a specified candidate dimension for which it is possible to generate a largest number of clusters to the dimension group as an index dimension.
    Type: Grant
    Filed: August 4, 2016
    Date of Patent: April 30, 2019
    Assignees: FUJITSU LIMITED, UNIVERSITY OF TSUKUBA
    Inventors: Tomotake Nakamura, Ryuhei Harada, Yasuteru Shigeta
  • Publication number: 20180217918
    Abstract: An apparatus, for a first loop included in a program code, determines whether an inner loop is included in the first loop. When the inner loop is included in the first loop, the apparatus determines whether a processing code other than the inner loop is included in the first loop. When both the inner loop and the processing code other than the inner loop are included in the first loop or when no inner loop is included in the first loop, the apparatus adds a performance measurement code for conducting performance measurement of the first loop to the program code.
    Type: Application
    Filed: January 17, 2018
    Publication date: August 2, 2018
    Applicant: FUJITSU LIMITED
    Inventor: Tomotake NAKAMURA
  • Publication number: 20170039315
    Abstract: A storage unit stores therein a collection of structures of biomolecules whose structure varies. A computing unit decreases a temperature set as a temperature parameter, which represents the temperature of the biomolecules, from a prescribed value in steps. When decreasing the temperature of the temperature parameter, the computing unit performs clustering on the structures included in the collection from before the decrease, detects detect outlier structures from the clustering result, and performs molecular dynamics simulations using the temperature parameter with the outlier structures as initial structures. Then, the computing unit stores structures generated by the molecular dynamics simulations in the storage unit.
    Type: Application
    Filed: August 4, 2016
    Publication date: February 9, 2017
    Applicants: FUJITSU LIMITED, University of Tsukuba
    Inventors: Tomotake NAKAMURA, Ryuhei HARADA, Yasuteru SHIGETA
  • Publication number: 20170039268
    Abstract: An information processing apparatus includes: a memory configured to store a plurality of structures of a substance whose structure changes and a dimension group, which is a group of index dimensions that are indices for structural analysis of the substance, out of a plurality of dimensions that express the structure of the substance; and a processor configured to perform a procedure including: performing, for each of a plurality of candidate dimensions, which are not included in the dimension group, out of the plurality of dimensions, clustering of a plurality of structures in multidimensional space that has every index dimension included in the dimension group and a candidate dimension as coordinate axes; and adding a specified candidate dimension for which it is possible to generate a largest number of clusters to the dimension group as an index dimension.
    Type: Application
    Filed: August 4, 2016
    Publication date: February 9, 2017
    Applicants: FUJITSU LIMITED, University of Tsukuba
    Inventors: Tomotake NAKAMURA, Ryuhei HARADA, Yasuteru SHIGETA
  • Publication number: 20160246918
    Abstract: An information processing apparatus includes: an outlying structure detecting unit that uses a certain outlier detection method to detect, from a distribution of molecular structures in a structural space, molecular structures deviating from others; an outlying degree specifying unit that specifies outlying degrees for the respective detected molecular structures; and an MD simulation executing unit that executes molecular simulations with initial structures set to the molecular structures to which weights are assigned in such a manner that a larger weight is assigned to a molecular structure for which the higher outlying degree has been specified.
    Type: Application
    Filed: February 1, 2016
    Publication date: August 25, 2016
    Applicants: Fujitsu Limited, University of Tsukuba
    Inventors: Tomotake NAKAMURA, Yasuteru SHIGETA, Ryuhei Harada
  • Publication number: 20120011188
    Abstract: A distributed processing system includes a plurality of information processing apparatuses, each of the information processing apparatuses including a transferring unit that divides data to be processed including data elements for each of which one of the information processing apparatuses is set for processing, that assigns divided data to the information processing apparatuses in the distributed processing system, and that transfers the divided data assigned to a different information processing apparatus to the different information processing apparatus; an allocation unit that allocates the data elements included in the divided data which is assigned to own information processing apparatus by the transferring unit in the own information processing apparatus or by the transferring unit in a different information processing apparatus, to an information processing apparatus that processes the data element; and a data processing unit that processes the allocated data elements.
    Type: Application
    Filed: September 19, 2011
    Publication date: January 12, 2012
    Applicant: FUJITSU LIMITED
    Inventor: Tomotake Nakamura