Patents by Inventor Tomoya Katsuki

Tomoya Katsuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9599644
    Abstract: A semiconductor device operates with electric power supplied from a direct-current power supply to an internal circuit in a state where a bypass capacitor is connected to a power supply terminal. The semiconductor device includes a load current control unit and a detection unit. The load current control unit changes an electric current supplied from the power supply terminal only in a predetermined operation period. The detection unit detects a voltage of the power supply terminal. The detection unit outputs a detection signal when the voltage is higher than a threshold upper limit in a case of being provided with the threshold upper limit. Alternatively, the detection unit outputs a detection signal when the voltage is lower than a threshold lower limit in a case of being provided with the threshold lower limit.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: March 21, 2017
    Assignee: DENSO CORPORATION
    Inventor: Tomoya Katsuki
  • Patent number: 9342097
    Abstract: A microcontroller includes a CPU (Central Processing Unit), a data input unit, and an oscillator that supplies a clock signal in response to operational modes of the microcontroller. The operational modes include a STOP mode, a SNOOZE mode and a RUN mode, in the STOP mode, the oscillator and the CPU are stopped, in the RUN mode, the CPU and the data input unit operate using the clock signal supplied from the oscillator, and in the SNOOZE mode, the oscillator starts and supplies the clock signal to the data input unit when the data input unit receives first data, and the microcontroller switches to the RUN mode after the data input unit receives second data using the clock signal.
    Type: Grant
    Filed: June 4, 2014
    Date of Patent: May 17, 2016
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yosuke Kawanaka, Seiya Indo, Tomoya Katsuki, Shinichi Nakatsu, Kimiharu Eto, Hirotaka Shimoda, Kuniyasu Ishihara, Yuusuke Urakawa, Yuusuke Sakaguchi, Shingo Furuta
  • Publication number: 20160103159
    Abstract: A semiconductor device operates with electric power supplied from a direct-current power supply to an internal circuit in a state where a bypass capacitor is connected to a power supply terminal. The semiconductor device includes a load current control unit and a detection unit. The load current control unit changes an electric current supplied from the power supply terminal only in a predetermined operation period. The detection unit detects a voltage of the power supply terminal. The detection unit outputs a detection signal when the voltage is higher than a threshold upper limit in a case of being provided with the threshold upper limit. Alternatively, the detection unit outputs a detection signal when the voltage is lower than a threshold lower limit in a case of being provided with the threshold lower limit.
    Type: Application
    Filed: September 30, 2015
    Publication date: April 14, 2016
    Inventor: Tomoya KATSUKI
  • Publication number: 20140289547
    Abstract: A microcontroller includes a CPU (Central Processing Unit), a data input unit, and an oscillator that supplies a clock signal in response to operational modes of the microcontroller. The operational modes include a STOP mode, a SNOOZE mode and a RUN mode, in the STOP mode, the oscillator and the CPU are stopped, in the RUN mode, the CPU and the data input unit operate using the clock signal supplied from the oscillator, and in the SNOOZE mode, the oscillator starts and supplies the clock signal to the data input unit when the data input unit receives first data, and the microcontroller switches to the RUN mode after the data input unit receives second data using the clock signal.
    Type: Application
    Filed: June 4, 2014
    Publication date: September 25, 2014
    Applicant: Renesas Electronics Corporation
    Inventors: Yosuke Kawanaka, Seiya Indo, Tomoya Katsuki, Shinichi Nakatsu, Kimiharu Eto, Hirotaka Shimoda, Kuniyasu Ishihara, Yuusuke Urakawa, Yuusuke Sakaguchi, Shingo Furuta
  • Patent number: 8751842
    Abstract: A microcontroller includes a data input unit that receives input data and outputs a start request signal according to the input data upon receiving the input data; an oscillator that starts according to the start request signal, to generate a clock signal; a clock signal supply control unit that outputs the start request signal supplied from the data input unit to the oscillator, and supplies the clock signal supplied from the oscillator generated after the start as a first clock signal and a second clock signal that are operation clock signals of the data input unit; and a CPU that operates the second clock signal as an operation clock, and performs processing according to the input data when the second clock signal is operated.
    Type: Grant
    Filed: May 13, 2011
    Date of Patent: June 10, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Yosuke Kawanaka, Seiya Indo, Tomoya Katsuki, Shinichi Nakatsu, Kimiharu Eto, Hirotaka Shimoda, Kuniyasu Ishihara, Yuusuke Urakawa, Yuusuke Sakaguchi, Shingo Furuta
  • Patent number: 8629792
    Abstract: An electric device includes first, second and third selectors. A first node connects to a first input of the first selector, a second node connects to a first input of the second selector, a third node connects to a second input of the first selector, and a fourth node connects to a second input of the second selector. A first switch connects to the first node, and a second switch connects to the second node. A first capacitor connects between the first switch and the third node, and a second capacitor connects between the second switch and the fourth node. A fifth node connects between an output of the first selector and a first input of the third selector, and a sixth node connects between an output of the second selector and a second input of the third selector. An A/D converter connects to an output of the third selector.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: January 14, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Tomoya Katsuki, Shinichirou Saitou
  • Publication number: 20120013497
    Abstract: An electric device includes first, second and third selectors. A first node connects to a first input of the first selector, a second node connects to a first input of the second selector, a third node connects to a second input of the first selector, and a fourth node connects to a second input of the second selector. A first switch connects to the first node, and a second switch connects to the second node. A first capacitor connects between the first switch and the third node, and a second capacitor connects between the second switch and the fourth node. A fifth node connects between an output of the first selector and a first input of the third selector, and a sixth node connects between an output of the second selector and a second input of the third selector. An A/D converter connects to an output of the third selector.
    Type: Application
    Filed: August 30, 2011
    Publication date: January 19, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Tomoya Katsuki, Shinichirou Saitou
  • Publication number: 20110285429
    Abstract: A microcontroller includes a data input unit that receives input data and outputs a start request signal according to the input data upon receiving the input data; an oscillator that starts according to the start request signal, to generate a clock signal; a clock signal supply control unit that outputs the start request signal supplied from the data input unit to the oscillator, and supplies the clock signal supplied from the oscillator generated after the start as a first clock signal and a second clock signal that are operation clock signals of the data input unit; and a CPU that operates the second clock signal as an operation clock, and performs processing according to the input data when the second clock signal is operated.
    Type: Application
    Filed: May 13, 2011
    Publication date: November 24, 2011
    Applicant: Renesas Electronics Corporation
    Inventors: Yosuke Kawanaka, Seiya Indo, Tomoya Katsuki, Shinichi Nakatsu, Kimiharu Eto, Hirotaka Shimoda, Kuniyasu Ishihara, Yuusuke Urakawa, Yuusuke Sakaguchi, Shingo Furuta
  • Patent number: 8018362
    Abstract: An A/D conversion circuit includes a plurality of transmission paths that transmit signal voltages and reference voltages, and an A/D conversion unit that A/D converts voltages output from the transmission paths. Each of the plurality of transmission paths includes a first switch that selectively outputs one of the signal voltage and the reference voltage, an S/H circuit that holds output voltage from the first switch, and a second switch that selectively outputs one of the output voltage from the first switch and output voltage from the S/H circuit.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: September 13, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Tomoya Katsuki, Shinichirou Saitou
  • Publication number: 20100283644
    Abstract: An A/D conversion circuit includes a plurality of transmission paths that transmit signal voltages and reference voltages, and an A/D conversion unit that A/D converts voltages output from the transmission paths. Each of the plurality of transmission paths includes a first switch that selectively outputs one of the signal voltage and the reference voltage, an S/H circuit that holds output voltage from the first switch, and a second switch that selectively outputs one of the output voltage from the first switch and output voltage from the S/H circuit.
    Type: Application
    Filed: April 29, 2010
    Publication date: November 11, 2010
    Applicant: NEC Electronics Corporation
    Inventors: Tomoya Katsuki, Shinichirou Saitou
  • Patent number: 7250740
    Abstract: In a method of generating pulse-width modulated waveform, the cycle of a carrier wave for the waveform is determined together with a first dead time value and a second dead time value both of which are set in a plurality of up-down counters, respectively. Using the plurality of the up-down counters is effective to assign individual dead times to upper and lower arms and to linearly control a PWM duty from 0% to 100%.
    Type: Grant
    Filed: April 4, 2005
    Date of Patent: July 31, 2007
    Assignee: NEC Electronics Corporation
    Inventors: Tomoya Katsuki, Masashi Tsubota
  • Publication number: 20050190005
    Abstract: In a method of generating pulse-width modulated waveform, the cycle of a carrier wave for the waveform is determined together with a first dead time value and a second dead time value both of which are set in a plurality of up-down counters, respectively. Using the plurality of the up-down counters is effective to assign individual dead times to upper and lower arms and to linearly control a PWM duty from 0% to 100%.
    Type: Application
    Filed: April 4, 2005
    Publication date: September 1, 2005
    Inventors: Tomoya Katsuki, Masashi Tsubota