Patents by Inventor Tomoya Nishitani

Tomoya Nishitani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210364578
    Abstract: A connection detector includes: a power supply line for use in supply of a power supply potential; a CC terminal; a ground terminal; an electric-current output circuit arranged between the power supply line and the CC terminal and including a first switch for use in disabling an electric-current output; a pulldown resistor circuit arranged between the CC terminal and the ground terminal and including a second switch for use in disabling a pulldown resistance; a bias circuit configured to generate a first reference potential and a second reference potential that is different from the first reference potential; and a role detector including a first comparator configured to compare the first reference potential with a voltage of the CC terminal and a second comparator configured to compare the second reference potential with a voltage of the CC terminal.
    Type: Application
    Filed: May 12, 2021
    Publication date: November 25, 2021
    Inventor: Tomoya NISHITANI
  • Patent number: 7663407
    Abstract: A semiconductor device includes a pre-buffer for transferring a data signal on the basis of a first power supply voltage, a main buffer for amplifying and outputting the data signal transferred by the pre-buffer on the basis of a second power supply voltage different from the first power supply voltage, a switch unit for controlling a conductive state between the pre-buffer and the main buffer on the basis of a switch control signal, and a control circuit for generating the switch control signal for controlling the pre-buffer to set an output level of the pre-buffer to ground potential in accordance with transition of logical level of the switch control signal.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: February 16, 2010
    Assignee: NEC Electronics Corporation
    Inventors: Tomoya Nishitani, Kenichi Kawakami
  • Publication number: 20090015292
    Abstract: A semiconductor device includes a pre-buffer for transferring a data signal on the basis of a first power supply voltage, a main buffer for amplifying and outputting the data signal transferred by the pre-buffer on the basis of a second power supply voltage different from the first power supply voltage, a switch unit for controlling a conductive state between the pre-buffer and the main buffer on the basis of a switch control signal, and a control circuit for generating the switch control signal for controlling the pre-buffer to set an output level of the pre-buffer to ground potential in accordance with transition of logical level of the switch control signal.
    Type: Application
    Filed: June 24, 2008
    Publication date: January 15, 2009
    Applicant: NEC Electronics Corporation
    Inventors: Tomoya Nishitani, Kenichi Kawakami