Patents by Inventor Tomoya Sasago

Tomoya Sasago has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250142229
    Abstract: The photoelectric conversion device includes a pixel. The pixel includes a photoelectric conversion unit and a signal processing circuit. The photoelectric conversion unit includes an avalanche diode that multiplies charge generated by an incident of photon by avalanche multiplication, and outputting a first signal in accordance with the incident of photon. The signal processing circuit includes a logic circuit that outputs a third signal in response to the first signal and a second signal. The signal processing circuit includes a first element having a first withstand voltage and a second element having a second withstand voltage lower than the first withstand voltage, and is configured such that the first signal is input to the first element and the second signal is input to the second element.
    Type: Application
    Filed: November 11, 2024
    Publication date: May 1, 2025
    Inventors: Yasuharu Ota, Tomoya Sasago
  • Patent number: 12278247
    Abstract: A signal processing device includes a plurality of pixel signal processing units and a signal line group. The plurality of pixel signal processing units is arranged in a first direction and a second direction, each of the plurality of signal processing units acquiring a digital signal having a plurality of bits based on an output from a corresponding avalanche photodiode. The signal line group is arranged corresponding to the plurality of pixel signal processing units arranged in the first direction and including a signal line to which a plurality of signals corresponding to a plurality of bits of different digits of the digital signal held in each of the plurality of pixel signal processing units arranged in the first direction are commonly output.
    Type: Grant
    Filed: November 20, 2023
    Date of Patent: April 15, 2025
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tomoya Sasago, Shintaro Maekawa, Yu Maehashi, Yasuharu Ota
  • Publication number: 20250080873
    Abstract: A photoelectric conversion apparatus includes an avalanche photodiode having a first terminal and a second terminal, a first power source connected to the first terminal, a second power source connected to the second terminal, a charge unit configured to control a voltage of the first terminal, a voltage control unit connected to the first terminal and configured to control a voltage of the first terminal in accordance with a voltage of the first terminal, and a third power source connected with the voltage control unit.
    Type: Application
    Filed: August 19, 2024
    Publication date: March 6, 2025
    Inventors: TOMOYA SASAGO, YASUSHI MATSUNO, KAZUHIRO MORIMOTO, WATARU ENDO, YU MAEHASHI
  • Publication number: 20250080881
    Abstract: A photoelectric conversion apparatus is provided. The apparatus includes a first substrate including an avalanche photodiode, a second substrate, a third substrate, and a temperature detection element having an output characteristic dependent on temperature. A signal processing circuit configured to process a signal output from the avalanche photodiode is arranged in at least parts of the second substrate and the third substrate, the first substrate, the second substrate, and the third substrate are stacked such that the second substrate is arranged between the first substrate and the third substrate, and the temperature detection element is arranged in one of the first substrate and the second substrate.
    Type: Application
    Filed: August 26, 2024
    Publication date: March 6, 2025
    Inventors: TOMOYA SASAGO, KAZUHIRO MORIMOTO, YU MAEHASHI
  • Patent number: 12177588
    Abstract: The photoelectric conversion device includes a pixel. The pixel includes a photoelectric conversion unit and a signal processing circuit. The photoelectric conversion unit includes an avalanche diode that multiplies charge generated by an incident of photon by avalanche multiplication, and outputting a first signal in accordance with the incident of photon. The signal processing circuit includes a logic circuit that outputs a third signal in response to the first signal and a second signal. The signal processing circuit includes a first element having a first withstand voltage and a second element having a second withstand voltage lower than the first withstand voltage, and is configured such that the first signal is input to the first element and the second signal is input to the second element.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: December 24, 2024
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yasuharu Ota, Tomoya Sasago
  • Patent number: 12142627
    Abstract: The wiring is configured so that both ends of a region including each of a plurality of pixel circuits in a first direction and both ends of the region in a second direction intersecting the first direction are connected by a combination of a wiring layer group.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: November 12, 2024
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yasuharu Ota, Tomoya Sasago
  • Publication number: 20240363667
    Abstract: A photoelectric conversion apparatus includes a first substrate and a second substrate. A plurality of wiring layers of a second wiring structure includes a wiring layer where first wiring for supplying a power supply voltage to a plurality of pixel circuits is disposed and an area occupied by the first wiring is the largest among the plurality of wiring layers, and a wiring layer group where the first wiring is disposed, the wiring layer group being located between the wiring layer where the area and a second semiconductor layer. In a plan view, the first wiring is configured to connect both ends of a region in a first direction and both ends of the region in a second direction intersecting the first direction by combination of the wiring layer group, the region including each of the plurality of pixel circuits.
    Type: Application
    Filed: July 1, 2024
    Publication date: October 31, 2024
    Inventors: YASUHARU OTA, TOMOYA SASAGO
  • Publication number: 20240353258
    Abstract: A photoelectric conversion apparatus includes a pixel including a photoelectric conversion unit for outputting a first signal in response to incidence of a photon, the photoelectric conversion unit including an avalanche diode for multiplying a charge occurring from the incidence of the photon by avalanche multiplication, a counter for counting a signal output from the photoelectric conversion unit, and a signal processing circuit connected between the counter and the photoelectric conversion unit and configured to control output of a third signal based on the first signal and a second signal. The signal processing circuit includes a first element having a first withstand voltage and a second element having a second withstand voltage and is configured such that the first signal is input to the first element and the second signal is input to the second element, the second withstand voltage being a withstand voltage lower than the first withstand voltage.
    Type: Application
    Filed: July 1, 2024
    Publication date: October 24, 2024
    Inventors: YASUHARU OTA, TOMOYA SASAGO
  • Publication number: 20240339079
    Abstract: A light-emitting device includes a plurality of light-emitting elements and a plurality of pixel circuits. The plurality of pixel circuits each includes a drive transistor configured to drive a corresponding one of the plurality of light-emitting elements, a write transistor configured to write a signal to a gate of the drive transistor, and a light emission control transistor configured to control connection between the gate of the drive transistor and a power supply. The light-emitting device includes a first control line for controlling the write transistor, a second control line for controlling the light emission control transistor, a first circuit configured to incline a signal waveform of the first control line, and a second circuit configured to incline a signal waveform of the second control line.
    Type: Application
    Filed: April 9, 2024
    Publication date: October 10, 2024
    Inventors: TOMOYA SASAGO, HIROMASA TSUBOI
  • Publication number: 20240267651
    Abstract: A photoelectric conversion device includes an avalanche photodiode including a first terminal and a second terminal, a first power supply connected to the first terminal, a second power supply connected to the second terminal, and a switch for switching a resistance value between the first power supply and the first terminal. The first terminal of the avalanche photodiode is connected to each of a gate of a first p-channel metal-oxide semiconductor (PMOS) transistor and a gate of a first n-channel MOS (NMOS) transistor, the first PMOS transistor and the first NMOS transistor being connected in series between a third and a fourth power supplies. The photoelectric conversion device further includes a first cut-off unit for cutting off an electrical path between the third power supply and the fourth power supply, and if the switch is controlled to a standby state, the first cut-off unit cuts off the electrical path.
    Type: Application
    Filed: April 17, 2024
    Publication date: August 8, 2024
    Inventor: TOMOYA SASAGO
  • Publication number: 20240088174
    Abstract: A signal processing device includes a plurality of pixel signal processing units and a signal line group. The plurality of pixel signal processing units is arranged in a first direction and a second direction, each of the plurality of signal processing units acquiring a digital signal having a plurality of bits based on an output from a corresponding avalanche photodiode. The signal line group is arranged corresponding to the plurality of pixel signal processing units arranged in the first direction and including a signal line to which a plurality of signals corresponding to a plurality of bits of different digits of the digital signal held in each of the plurality of pixel signal processing units arranged in the first direction are commonly output.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: Tomoya Sasago, Shintaro Maekawa, Yu Maehashi, Yasuharu Ota
  • Patent number: 11855106
    Abstract: A signal processing device includes a plurality of pixel signal processing units and a signal line group. The plurality of pixel signal processing units is arranged in a first direction and a second direction, each of the plurality of signal processing units acquiring a digital signal having a plurality of bits based on an output from a corresponding avalanche photodiode. The signal line group is arranged corresponding to the plurality of pixel signal processing units arranged in the first direction and including a signal line to which a plurality of signals corresponding to a plurality of bits of different digits of the digital signal held in each of the plurality of pixel signal processing units arranged in the first direction are commonly output.
    Type: Grant
    Filed: January 18, 2022
    Date of Patent: December 26, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tomoya Sasago, Shintaro Maekawa, Yu Maehashi, Yasuharu Ota
  • Patent number: 11818483
    Abstract: A photoelectric conversion device includes a plurality of pixels each including an avalanche diode, a quench unit reducing the avalanche multiplication of the avalanche diode, a pulse conversion unit converting an output signal of the avalanche diode into pulses, and a signal generation unit generating an accumulation signal obtained by accumulating the number of pulses, a detection unit detecting whether or not the width of the pulse is not smaller than a predetermined width, and a voltage control unit controlling a reverse bias voltage applied to the avalanche diode within a range not lower than the breakdown voltage of the avalanche diode based on the result of the detection. The voltage control unit lowers the reverse bias voltage within a range not lower than the breakdown voltage when the accumulation value of pixels whose pulse width is not smaller than a predetermined width is not smaller than a predetermined value.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: November 14, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tomoya Sasago, Yukihiro Kuroda
  • Patent number: 11411028
    Abstract: A photoelectric conversion apparatus includes a first diode which is an avalanche multiplication-type and a second diode which is an avalanche multiplication-type formed within a semiconductor substrate, a first transistor forming a first quench element, and a second transistor forming a second quench element. The first transistor and the second transistor are disposed between the first diode and the second diode in a planar view. The first transistor and the second transistor are disposed in a common semiconductor well region formed within the semiconductor substrate.
    Type: Grant
    Filed: February 20, 2020
    Date of Patent: August 9, 2022
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tomoya Sasago, Yukihiro Kuroda
  • Publication number: 20220238589
    Abstract: The wiring is configured so that both ends of a region including each of a plurality of pixel circuits in a first direction and both ends of the region in a second direction intersecting the first direction are connected by a combination of a wiring layer group.
    Type: Application
    Filed: January 20, 2022
    Publication date: July 28, 2022
    Inventors: Yasuharu Ota, Tomoya Sasago
  • Publication number: 20220238574
    Abstract: A signal processing device includes a plurality of pixel signal processing units and a signal line group. The plurality of pixel signal processing units is arranged in a first direction and a second direction, each of the plurality of signal processing units acquiring a digital signal having a plurality of bits based on an output from a corresponding avalanche photodiode. The signal line group is arranged corresponding to the plurality of pixel signal processing units arranged in the first direction and including a signal line to which a plurality of signals corresponding to a plurality of bits of different digits of the digital signal held in each of the plurality of pixel signal processing units arranged in the first direction are commonly output.
    Type: Application
    Filed: January 18, 2022
    Publication date: July 28, 2022
    Inventors: Tomoya Sasago, Shintaro Maekawa, Yu Maehashi, Yasuharu Ota
  • Publication number: 20220239857
    Abstract: The photoelectric conversion device includes a pixel. The pixel includes a photoelectric conversion unit and a signal processing circuit. The photoelectric conversion unit includes an avalanche diode that multiplies charge generated by an incident of photon by avalanche multiplication, and outputting a first signal in accordance with the incident of photon. The signal processing circuit includes a logic circuit that outputs a third signal in response to the first signal and a second signal. The signal processing circuit includes a first element having a first withstand voltage and a second element having a second withstand voltage lower than the first withstand voltage, and is configured such that the first signal is input to the first element and the second signal is input to the second element.
    Type: Application
    Filed: January 20, 2022
    Publication date: July 28, 2022
    Inventors: Yasuharu Ota, Tomoya Sasago
  • Patent number: 11362231
    Abstract: An avalanche diode includes a first semiconductor region of a first conductivity type disposed in a first depth, a second semiconductor region disposed in a second depth deeper than the first depth with respect to a first surface, in contact with the first semiconductor region, and a third semiconductor region disposed in a third depth deeper than the second depth with respect to the first surface, in contact with the second semiconductor region. Avalanche multiplication is caused by the first and third semiconductor regions. The first, second, and third semiconductor regions overlap in plan view. A potential difference between the first and second semiconductor regions with respect to main charge carriers of a semiconductor region of the first conductive type is smaller than a potential difference between the first and third semiconductor regions with respect to the charge carriers.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: June 14, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tomoya Sasago, Junji Iwata
  • Publication number: 20220014698
    Abstract: A photoelectric conversion device includes a plurality of pixels each including an avalanche diode, a quench unit reducing the avalanche multiplication of the avalanche diode, a pulse conversion unit converting an output signal of the avalanche diode into pulses, and a signal generation unit generating an accumulation signal obtained by accumulating the number of pulses, a detection unit detecting whether or not the width of the pulse is not smaller than a predetermined width, and a voltage control unit controlling a reverse bias voltage applied to the avalanche diode within a range not lower than the breakdown voltage of the avalanche diode based on the result of the detection. The voltage control unit lowers the reverse bias voltage within a range not lower than the breakdown voltage when the accumulation value of pixels whose pulse width is not smaller than a predetermined width is not smaller than a predetermined value.
    Type: Application
    Filed: June 29, 2021
    Publication date: January 13, 2022
    Inventors: Tomoya Sasago, Yukihiro Kuroda
  • Publication number: 20200273895
    Abstract: A photoelectric conversion apparatus includes a first diode which is an avalanche multiplication-type and a second diode which is an avalanche multiplication-type formed within a semiconductor substrate, a first transistor forming a first quench element, and a second transistor forming a second quench element. The first transistor and the second transistor are disposed between the first diode and the second diode in a planar view. The first transistor and the second transistor are disposed in a common semiconductor well region formed within the semiconductor substrate.
    Type: Application
    Filed: February 20, 2020
    Publication date: August 27, 2020
    Inventors: Tomoya Sasago, Yukihiro Kuroda