Abstract: A semiconductor substrate including a first main surface and a second main surface opposing each other is provided. The semiconductor substrate includes a first semiconductor region of a first conductivity type. The semiconductor substrate includes a plurality of planned regions where a plurality of second semiconductor regions of a second conductivity type forming pn junctions with the first semiconductor region are going to be formed, in a side of the second main surface. A textured region is formed on surfaces included in the plurality of planned regions, in the second main surface. The plurality of second semiconductor regions are formed in the plurality of planned regions after forming the textured region. The first main surface is a light incident surface of the semiconductor substrate.

Abstract: A semiconductor substrate including a first main surface and a second main surface opposing each other is provided. The semiconductor substrate includes a first semiconductor region of a first conductivity type. The semiconductor substrate includes a plurality of planned regions where a plurality of second semiconductor regions of a second conductivity type forming pn junctions with the first semiconductor region are going to be formed, in a side of the second main surface. A textured region is formed on surfaces included in the plurality of planned regions, in the second main surface. The plurality of second semiconductor regions are formed in the plurality of planned regions after forming the textured region. The first main surface is a light incident surface of the semiconductor substrate.

Abstract: A duct structure having excellent sealing performance at a connection portion between a duct and a piping member. The duct structure includes a duct and a piping member. The duct includes an opening in a tubular portion, and the piping member includes a piping portion. The piping portion is inserted into the opening and connected to the duct, and a foam rubber sealing material is disposed in a compressed state between an outer peripheral surface of the piping portion and an edge of the opening.

Abstract: A semiconductor substrate including a first main surface and a second main surface opposing each other is provided. The semiconductor substrate includes a first semiconductor region of a first conductivity type. The semiconductor substrate includes a plurality of planned regions where a plurality of second semiconductor regions of a second conductivity type forming pn junctions with the first semiconductor region are going to be formed, in a side of the second main surface. A textured region is formed on surfaces included in the plurality of planned regions, in the second main surface. The plurality of second semiconductor regions are formed in the plurality of planned regions after forming the textured region. The first main surface is a light incident surface of the semiconductor substrate.

Abstract: A semiconductor substrate including a first main surface and a second main surface opposing each other is provided. The semiconductor substrate includes a first semiconductor region of a first conductivity type. The semiconductor substrate includes a plurality of planned regions where a plurality of second semiconductor regions of a second conductivity type forming pn junctions with the first semiconductor region are going to be formed, in a side of the second main surface. A textured region is formed on surfaces included in the plurality of planned regions, in the second main surface. The plurality of second semiconductor regions are formed in the plurality of planned regions after forming the textured region. The first main surface is a light incident surface of the semiconductor substrate.

Abstract: An object cutting method includes: a first step of preparing an object to be processed including a single crystal silicon substrate and a functional device layer provided on a first main surface side and forming an etching protection layer on a second main surface of the object; a second step of irradiating the object with laser light to form at least one row of modified regions in the single crystal silicon substrate and to form a fracture in the object so as to extend between the at least one row of modified regions and a surface of the etching protection layer; and a third step of performing dry etching on the object from the second main surface side, in a state in which the etching protection layer is formed on the second main surface, to form a groove opening to the second main surface.

Abstract: A chip production method includes a first step of setting a first cutting line and a second cutting line on a substrate including a plurality of functional elements, a second step of forming a mask on the substrate such that the functional elements are covered and an intersection region including an intersection of the first cutting line and the second cutting line is exposed, a third step of removing the intersection region from the substrate and forming a penetration hole by etching the substrate using the mask, a fourth step of forming a modified region in the substrate along the first cutting line, a fifth step of forming a modified region in the substrate along the second cutting line, and a sixth step of forming chips by cutting the substrate along the first cutting line and the second cutting line.

Abstract: A semiconductor substrate includes first and second main surfaces opposing each other. The semiconductor substrate includes second semiconductor regions in a side of the second main surface. Each of the second semiconductor regions includes a first region including a textured surface, and a second region where a bump electrode is disposed. The second semiconductor regions are two-dimensionally distributed in a first direction and a second direction orthogonal to each other when viewed in a direction orthogonal to the semiconductor substrate. The first region and the second region are adjacent to each other in a direction crossing the first direction and the second direction. The textured surface of the first region is located toward the first main surface in comparison to the surface of the second region in a thickness direction of the semiconductor substrate. The first main surface is a light incident surface of the semiconductor substrate.

Abstract: A semiconductor substrate includes a first main surface and a second main surface opposing each other. The semiconductor substrate includes a plurality of second semiconductor regions in a side of the second main surface. Each of the second semiconductor regions includes a first region including a textured surface, and a second region where a bump electrode is disposed. An insulating film includes a first insulating film covering surfaces of the second semiconductor regions, and a second insulating film covering peripheries of pad electrodes. The pad electrodes include a first electrode region in contact with the second region, and a second electrode region continuous with the first electrode region. The second electrode region is disposed on at least a part of a region included in the first insulating film and corresponding to the first region. The first main surface is a light incident surface of the semiconductor substrate.

Abstract: A hermetic terminal (110) includes a barrier wall (12) to be joined to a housing (11), a body (15) that is to be connected to a signal ground and is fixed to the barrier wall (12) via a first insulator (13), and a signal line (16) passing through the body (15) and fixed to the body (15) via a second insulator (14). When the barrier wall (12) is joined to the housing (11), a space (28) is formed between an inner wall of the housing (11) and a surface (31) of the body (15) intersecting an end face (29) of the body (15) positioned towards the inside of the housing (11).

Abstract: A semiconductor substrate includes a first main surface and a second main surface opposing each other. The semiconductor substrate includes a plurality of second semiconductor regions in a side of the second main surface. Each of the second semiconductor regions includes a first region including a textured surface, and a second region where a bump electrode is disposed. An insulating film includes a first insulating film covering surfaces of the second semiconductor regions, and a second insulating film covering peripheries of pad electrodes. The pad electrodes include a first electrode region in contact with the second region, and a second electrode region continuous with the first electrode region. The second electrode region is disposed on at least a part of a region included in the first insulating film and corresponding to the first region. The first main surface is a light incident surface of the semiconductor substrate.

Abstract: A semiconductor substrate includes first and second main surfaces opposing each other. The semiconductor substrate includes second semiconductor regions in a side of the second main surface. Each of the second semiconductor regions includes a first region including a textured surface, and a second region where a bump electrode is disposed. The second semiconductor regions are two-dimensionally distributed in a first direction and a second direction orthogonal to each other when viewed in a direction orthogonal to the semiconductor substrate. The first region and the second region are adjacent to each other in a direction crossing the first direction and the second direction. The textured surface of the first region is located toward the first main surface in comparison to the surface of the second region in a thickness direction of the semiconductor substrate. The first main surface is a light incident surface of the semiconductor substrate.

Abstract: A chip production method includes a first step of setting a first cutting line and a second cutting line on a substrate including a plurality of functional elements, a second step of forming a mask on the substrate such that the functional elements are covered and an intersection region including an intersection of the first cutting line and the second cutting line is exposed, a third step of removing the intersection region from the substrate and forming a penetration hole by etching the substrate using the mask, a fourth step of forming a modified region in the substrate along the first cutting line, a fifth step of forming a modified region in the substrate along the second cutting line, and a sixth step of forming chips by cutting the substrate along the first cutting line and the second cutting line.

Abstract: A semiconductor substrate includes a first main surface and a second main surface opposing each other. The semiconductor substrate includes a first semiconductor region of a first conductivity type, and a plurality of second semiconductor regions constituting pn junctions with the first semiconductor region. The semiconductor substrate includes the plurality of second semiconductor in a side of the second main surface. Each of the plurality of second semiconductor regions includes a first region including a textured surface, and a second region including no textured surface. A thickness of the first region at a deepest position of recesses of the textured surface is smaller than a distance between a surface of the second region and the deepest position in a thickness direction of the semiconductor substrate. The first main surface is a light incident surface of the semiconductor substrate.

Abstract: A semiconductor substrate including a first main surface and a second main surface opposing each other is provided. The semiconductor substrate includes a first semiconductor region of a first conductivity type. The semiconductor substrate includes a plurality of planned regions where a plurality of second semiconductor regions of a second conductivity type forming pn junctions with the first semiconductor region are going to be formed, in a side of the second main surface. A textured region is formed on surfaces included in the plurality of planned regions, in the second main surface. The plurality of second semiconductor regions are formed in the plurality of planned regions after forming the textured region. The first main surface is a light incident surface of the semiconductor substrate.

Abstract: An object cutting method includes: a first step of preparing an object including a single crystal silicon substrate and a functional device layer provided on a first main surface side; a second step of irradiating the object with laser light to form at least one row of modified regions in the single crystal silicon substrate and to form a fracture in the object so as to extend between the at least one row of modified regions and a second main surface of the object; and a third step of performing dry etching on the object from the second main surface side to form a groove opening to the second main surface. In the third step, in a state in which an etching protection layer having a gas passing region formed, is formed on the second main surface, the dry etching is performed by using a xenon difluoride gas.

Abstract: An object cutting method includes: a first step of preparing an object to be processed including a single crystal silicon substrate and a functional device layer provided on a first main surface side and forming an etching protection layer on a second main surface of the object; a second step of irradiating the object with laser light to form at least one row of modified regions in the single crystal silicon substrate and to form a fracture in the object so as to extend between the at least one row of modified regions and a surface of the etching protection layer; and a third step of performing dry etching on the object from the second main surface side, in a state in which the etching protection layer is formed on the second main surface, to form a groove opening to the second main surface.