Patents by Inventor Tomoya Uchiike

Tomoya Uchiike has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8082006
    Abstract: A receiver of a wireless base station that uses a simple mode to detect a failure is provided, and an SW 201 switches whether an input port of the receiver 133 is to be connected with an antenna 114 or to be terminated. An LNA (a low noise amplifier) 205 amplifies an input signal with a low distortion. SWs 202 and 203 switch between a first path which runs through the LNA 205 and a second path 204 which does not run through the LNA 205. An AGC AMP, the gain of which is controlled such that the output thereof is constant, amplifies the signal with the controlled gain. A base station control section uses the SW 201 to terminate the input port of the receiver so that thermal noise is input to the LNA 205.
    Type: Grant
    Filed: December 19, 2005
    Date of Patent: December 20, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Yoshiaki Hasegawa, Akihiro Saito, Tomoya Uchiike, Yoshihiro Kanomata
  • Patent number: 7995674
    Abstract: There is a need for effectively compensating distortion when a predistortion transmitter is subject to not only a memory effect due to nonlinearity of an amplifier, but also a modulator's DC offset, IQ unbalance, or local quadrature error. A predistortor to be used is a polynomial predistortor including a polynomial basis generation portion and an inner product calculation portion. The polynomial basis generation portion delays a real part and an imaginary part of a complex input signal Sx=Ix+jQx for up to M samples to generate 2(M+1) signals, duplicately combines these signals to generate monomials having maximum degree N, and outputs, as a basis vector, all or part of the monomials depending or needs. The inner product calculation portion performs an inner product calculation using a coefficient vector, i.e., a set of complex numbers sized equally to the basis vector to find a polynomial value and outputs the value as a complex signal.
    Type: Grant
    Filed: December 29, 2010
    Date of Patent: August 9, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Kazuyuki Hori, Shouhei Murakami, Yuji Ishida, Tomoya Uchiike, Yoshiaki Hasegawa
  • Publication number: 20110096865
    Abstract: There is a need for effectively compensating distortion when a predistortion transmitter is subject to not only a memory effect due to nonlinearity of an amplifier, but also a modulator's DC offset, IQ unbalance, or local quadrature error. A predistortor to be used is a polynomial predistortor including a polynomial basis generation portion and an inner product calculation portion. The polynomial basis generation portion delays a real part and an imaginary part of a complex input signal Sx=Ix+jQx for up to M samples to generate 2(M+1) signals, duplicately combines these signals to generate monomials having maximum degree N, and outputs, as a basis vector, all or part of the monomials depending or needs. The inner product calculation portion performs an inner product calculation using a coefficient vector, i.e., a set of complex numbers sized equally to the basis vector to find a polynomial value and outputs the value as a complex signal.
    Type: Application
    Filed: December 29, 2010
    Publication date: April 28, 2011
    Inventors: Kazuyuki Hori, Shouhei Murakami, Yuji Ishida, Tomoya Uchiike, Yoshiaki Hasegawa
  • Patent number: 7864881
    Abstract: There is a need for effectively compensating distortion when a predistortion transmitter is subject to not only a memory effect due to nonlinearity of an amplifier, but also a modulator's DC offset, IQ unbalance, or local quadrature error. A predistortor to be used is a polynomial predistortor including a polynomial basis generation portion and an inner product calculation portion. The polynomial basis generation portion delays a real part and an imaginary part of a complex input signal Sx=Ix+jQx for up to M samples to generate 2(M+1) signals, duplicately combines these signals to generate monomials having maximum degree N, and outputs, as a basis vector, all or part of the monomials depending or needs. The inner product calculation portion performs an inner product calculation using a coefficient vector, i.e., a set of complex numbers sized equally to the basis vector to find a polynomial value and outputs the value as a complex signal.
    Type: Grant
    Filed: February 8, 2007
    Date of Patent: January 4, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Kazuyuki Hori, Shouhei Murakami, Yuji Ishida, Tomoya Uchiike, Yoshiaki Hasegawa
  • Publication number: 20090170560
    Abstract: A receiver of a wireless base station that uses a simple mode to detect a failure is provided, and an SW 201 switches whether an input port of the receiver 133 is to be connected with an antenna 114 or to be terminated. An LNA (a low noise amplifier) 205 amplifies an input signal with a low distortion. SWs 202 and 203 switch between a first path which runs through the LNA 205 and a second path 204 which does not run through the LNA 205. An AGC AMP, the gain of which is controlled such that the output thereof is constant, amplifies the signal with the controlled gain. A base station control section uses the SW 201 to terminate the input port of the receiver so that thermal noise is input to the LNA 205.
    Type: Application
    Filed: December 19, 2005
    Publication date: July 2, 2009
    Inventors: Yoshiaki Hasegawa, Akihiro Saito, Tomoya Uchiike, Yoshihiro Kanomata
  • Publication number: 20070237260
    Abstract: There is a need for effectively compensating distortion when a predistortion transmitter is subject to not only a memory effect due to nonlinearity of an amplifier, but also a modulator's DC offset, IQ unbalance, or local quadrature error. A predistortor to be used is a polynomial predistortor including a polynomial basis generation portion and an inner product calculation portion. The polynomial basis generation portion delays a real part and an imaginary part of a complex input signal Sx=Ix+jQx for up to M samples to generate 2 (M+1) signals, duplicately combines these signals to generate monomials having maximum degree N, and outputs, as a basis vector, all or part of the monomials depending or needs. The inner product calculation portion performs an inner product calculation using a coefficient vector, i.e., a set of complex numbers sized equally to the basis vector to find a polynomial value and outputs the value as a complex signal.
    Type: Application
    Filed: February 8, 2007
    Publication date: October 11, 2007
    Inventors: Kazuyuki Hori, Shouhei Murakami, Yuji Ishida, Tomoya Uchiike, Yoshiaki Hasegawa