Abstract: A termination structure in which a semiconductor active region is surrounded with a guard ring and capable of preventing corrosion of a metal layer connected to the guard ring includes: an active region and a guard ring region surrounding the active region. A guard ring is formed on the semiconductor substrate, and an interlayer insulating film is formed on the semiconductor substrate so as to cover the guard ring. A field plate is disposed on the interlayer insulating film and is electrically connected to the guard ring via a contact penetrating the interlayer insulating film. A protective film covers the field plate, which has a laminated structure including a first metal in contact with the guard ring and a second metal which is disposed in contact with the first metal and has a lower standard potential than the first metal.

Abstract: Provided are a semiconductor device and a power converting device utilizing a field-stop layer in a vertical semiconductor device with improved manufacturability using large-diameter wafers. A semiconductor device manufacturing method according to the present invention is characterized by: a step for, after a pattern on a main surface side of a drift layer of a first conductivity type is formed, irradiating ions from a second main surface side to a predetermined depth; a step for, after the ion irradiation, converting the ions into donors by anneal processing of heating at 300-450° C. for 60 seconds or less, thereby forming a field-stop layer; and a step for reducing the thickness of a semiconductor substrate to a predetermined value from the second main surface side such that a crystal defect having occurred in the ion irradiating step is eliminated.

Abstract: A semiconductor device having a high cutoff resistance capable of suppressing local current/electric field concentration and current concentration at a chip termination portion due to an electric field variation between IGBT cells due to a shape variation and impurity variation during manufacturing. The semiconductor device is characterized by including an emitter electrode formed on a front surface of a semiconductor substrate via an interlayer insulating film, a collector electrode formed on a back surface of the semiconductor substrate, a first semiconductor layer of a first conductivity type in contact with the collector electrode, a second semiconductor layer of a second conductivity type, a central area cell, and an outer peripheral area cell located outside the central area cell.

Abstract: A current switching semiconductor device to be used in a power conversion device achieves both a low conduction loss and a low switching loss. The semiconductor device includes the IGBT in which only Gc gates are provided and an impurity concentration of the p type collector layer is high, and the IGBT in which the Gs gates and the Gc gates are provided and an impurity concentration of the p type collector layer is low. When the semiconductor device is turned off, the semiconductor device transitions from a state in which a voltage lower than a threshold voltage is applied to both the Gs gates and the Gc gates to a state in which a voltage equal to or higher than the threshold voltage is applied to the Gc gates prior to the Gs gates.

Abstract: The invention provides an inexpensive flywheel diode having a low power loss. A semiconductor substrate side of a gate electrode provided on a surface of an anode electrode side of a semiconductor substrate including silicon is surrounded by a p layer, an n layer, and a p layer via a gate insulating film. The anode electrode is in contact with the p layer with a low resistance, and is also in contact with the n layer or the p layer, and a Schottky diode is formed between the anode electrode and the n layer or the p layer.

Abstract: A termination structure in which a semiconductor active region is surrounded with a guard ring and capable of preventing corrosion of a metal layer connected to the guard ring includes: an active region and a guard ring region surrounding the active region. A guard ring is formed on the semiconductor substrate, and an interlayer insulating film is formed on the semiconductor substrate so as to cover the guard ring. A field plate is disposed on the interlayer insulating film and is electrically connected to the guard ring via a contact penetrating the interlayer insulating film. A protective film covers the field plate, which has a laminated structure including a first metal in contact with the guard ring and a second metal which is disposed in contact with the first metal and has a lower standard potential than the first metal.

Abstract: A current switching semiconductor device to be used in a power conversion device achieves both a low conduction loss and a low switching loss. The semiconductor device includes the IGBT in which only Gc gates are provided and an impurity concentration of the p type collector layer is high, and the IGBT in which the Gs gates and the Gc gates are provided and an impurity concentration of the p type collector layer is low. When the semiconductor device is turned off, the semiconductor device transitions from a state in which a voltage lower than a threshold voltage is applied to both the Gs gates and the Gc gates to a state in which a voltage equal to or higher than the threshold voltage is applied to the Gc gates prior to the Gs gates.

Abstract: The invention provides an inexpensive flywheel diode having a low power loss. A semiconductor substrate side of a gate electrode provided on a surface of an anode electrode side of a semiconductor substrate including silicon is surrounded by a p layer, an n layer, and a p layer via a gate insulating film. The anode electrode is in contact with the p layer with a low resistance, and is also in contact with the n layer or the p layer, and a Schottky diode is formed between the anode electrode and the n layer or the p layer.

Abstract: A semiconductor device including: a semiconductor element; and a first electrode formed on a first surface of the semiconductor element. The first electrode has a stacked structure including a first electroless Ni plating layer. The first electroless Ni plating layer contains nickel (Ni) and phosphorus (P) as a composition. A phosphorus (P) concentration of the first electroless Ni plating layer is 2.5 wt % to 6 wt % inclusive, and a crystallization rate of Ni3P in the first electroless Ni plating layer is 0% to 20% inclusive.

Abstract: Provided is a semiconductor device in which, in a case where a metallic plate (a conductive member) is bonded by being sintered to a semiconductor chip having an IGBT gate structure, an excess stress is less likely to be generated in a gate wiring section of the semiconductor chip even when pressure is applied in a sinter bonding process, so that a characteristic failure is reduced.

Abstract: A semiconductor device including: a semiconductor element; and a first electrode formed on a first surface of the semiconductor element. The first electrode has a stacked structure including a first electroless Ni plating layer. The first electroless Ni plating layer contains nickel (Ni) and phosphorus (P) as a composition. A phosphorus (P) concentration of the first electroless Ni plating layer is 2.5 wt % to 6 wt % inclusive, and a crystallization rate of Ni3P in the first electroless Ni plating layer is 0% to 20% inclusive.

Abstract: Provided is a semiconductor device in which, in a case where a metallic plate (a conductive member) is bonded by being sintered to a semiconductor chip having an IGBT gate structure, an excess stress is less likely to be generated in a gate wiring section of the semiconductor chip even when pressure is applied in a sinter bonding process, so that a characteristic failure is reduced.

Abstract: An anode electrode and a cathode electrode formed on a silicon semiconductor substrate, p-type layer formed next to the anode electrode, an n-type layer formed next to the cathode electrode by a V-group element being diffused, an n? layer formed between the p-type layer and the n-type layer, and an n-buffer layer formed between the n? layer and the n-type layer and containing oxygen are provided and an oxygen concentration in an area of a width of at least 30 ?m from a surface on a side of the n-type layer of the cathode electrode toward the anode electrode is set to 1×1017 cm?3 or more and also the oxygen concentration of the n? layer in a position in contact with the p-type layer is set to less than 3×1017 cm?3.

Abstract: An anode electrode and a cathode electrode formed on a silicon semiconductor substrate, p-type layer formed next to the anode electrode, an n-type layer formed next to the cathode electrode by a V-group element being diffused, an n? layer formed between the p-type layer and the n-type layer, and an n-buffer layer formed between the n? layer and the n-type layer and containing oxygen are provided and an oxygen concentration in an area of a width of at least 30 ?m from a surface on a side of the n-type layer of the cathode electrode toward the anode electrode is set to 1×1017 cm?3 or more and also the oxygen concentration of the n? layer in a position in contact with the p-type layer is set to less than 3×1017 cm?3.

Abstract: A semiconductor device includes a semiconductor substrate in which a semiconductor element is formed, an electrode structure of a first semiconductor chip which is provided on a first surface of an n+-type semiconductor layer of the semiconductor substrate to be electrically connected to the semiconductor element and in which a first Al metal layer composed of Al or Al alloy, a Cu diffusion-prevention layer, a second Al metal layer composed of Al or Al alloy, and a Ni layer are formed in this order, and a conductive member which is bonded to the electrode structure of the first semiconductor chip via a sintered copper layer disposed on a surface of the Ni layer. In this semiconductor device, a crystal plane orientation of Al crystal grains on a surface of the second Al metal layer is principally on (110) plane.

Abstract: A solid-state image sensing device is configured such that a first voltage is applied to a first conductivity type semiconductor region and a second voltage is applied to source-drain regions having a second conductivity type of the MOS capacitance to apply inverse bias between the semiconductor region and the source-drain regions of the MOS capacitance.

Abstract: In a region of a weak internal electric field, photocharges generated in a region deeper than the photodiode are diffused laterally to lower the sensitivity by photoelectrons flowing into adjacent pixels, etc (crosstalk). An anti-crosstalk layer is disposed in the photodiode forming portion, and between a pixel region and a peripheral circuit region. Crosstalk between a pixel and a pixel or between a pixel region and a peripheral circuit region is decreased to improve the photosensitivity.

Abstract: A solid-state image sensing device is configured such that a first voltage is applied to a first conductivity type semiconductor region and a second voltage is applied to source-drain regions having a second conductivity type of the MOS capacitance to apply inverse bias between the semiconductor region and the source-drain regions of the MOS capacitance.

Abstract: In a solid-state image sensor device, the efficiency of light collection to a light-receiving region of a photodiode PD through a microlens is enhanced by arranging a wiring line configuration. Each of the first metal layer and the second metal layer is arranged to have a ring-like portion formed along a profile of the light-receiving region of the photodiode PD in a fashion that an upper position over the photodiode PD is surrounded by the first and second metal layers and a third metal layer.

Abstract: In a region of a weak internal electric field, photocharges generated in a region deeper than the photodiode are diffused laterally to lower the sensitivity by photoelectrons flowing into adjacent pixels, etc (crosstalk). An anti-crosstalk layer is disposed in the photodiode forming portion, and between a pixel region and a peripheral circuit region. Crosstalk between a pixel and a pixel or between a pixel region and a peripheral circuit region is decreased to improve the photosensitivity.