Patents by Inventor Tomoyasu Inoue

Tomoyasu Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080128813
    Abstract: A semiconductor device includes: a semiconductor substrate; and a plurality of crystalline insulation films which are formed on the semiconductor substrate and have at least two crystalline insulation films. Crystal orientations of the at least two crystalline insulation films are different from each other.
    Type: Application
    Filed: November 29, 2007
    Publication date: June 5, 2008
    Inventors: Ichiro MIZUSHIMA, Tomoyasu Inoue
  • Patent number: 4746803
    Abstract: In an apparatus for forming a single crystal semiconductor layer from a non-single-crystalline semiconductor material by scanning a region of the material with an electron beam, a first pair of deflection electrodes and a second pair of deflection electrodes, both pairs being provided in the path of the electron beam. A deflection signal generated by modifying the amplitude of a high-frequency fundamental wave signal with a modulation wave signal having a frequency lower than that of the high-frequency fundamental wave signal is supplied to the deflection electrodes of the first pair. The electrodes rapidly deflect the electron beam in a first direction, while changing the range of deflecting the beam, thereby forming a locus of the beam spot on the sample. Simultaneously, the deflection electrodes of the second pair deflect the beam in a second direction, thereby annealing a region of the material, to form a single crystal semiconductor layer.
    Type: Grant
    Filed: September 8, 1986
    Date of Patent: May 24, 1988
    Assignee: Agency of Industrial Science and Technology
    Inventors: Tomoyasu Inoue, Hiroyuki Tango, Kyoichi Suguro, Iwao Higashinakagawa, Toshihiko Hamasaki
  • Patent number: 4662949
    Abstract: In an apparatus for forming a single crystal semiconductor layer from a non-single-crystalline semiconductor material by scanning a region of the material with an electron beam, a first pair of deflection electrodes and a second pair of deflection electrodes, both pairs being provided in the path of the electron beam. A deflection signal generated by modifying the amplitude of a high-frequency fundamental wave signal with a modulation wave signal having a frequency lower than that of the high-frequency fundamental wave signal is supplied to the deflection electrodes of the first pair. The electrodes rapidly deflect the electron beam in a first direction, while changing the range of deflecting the beam, thereby forming a locus of the beam spot on the sample. Simultaneously, the deflection electrodes of the second pair deflect the beam in a second direction, thereby annealing a region of the material, to form a single crystal semiconductor layer.
    Type: Grant
    Filed: August 5, 1985
    Date of Patent: May 5, 1987
    Assignee: Director-General of Agency of Industrial Science and Technology
    Inventors: Tomoyasu Inoue, Hiroyuki Tango, Kyoichi Suguro, Iwao Higashinakagawa, Toshihiko Hamasaki
  • Patent number: 4656054
    Abstract: A method is shown which manufactures a semiconductor device having a capacitor. An insulation film having at least one opening of a predetermined pattern is formed on a capacitor formation area on a semiconductor substrate. The opening reaches the surface portion of the semiconductor substrate to permit it to be exposed. A semiconductor layer is selectively grown on the bottom surface of the opening, i.e., on the exposed surface of the semiconductor substrate. Thereafter, the insulation film is removed to leave a recessed region in a capacitor formation area and a capacitor electrode is formed in the capacitor formation area with a gate insulation film therebetween.
    Type: Grant
    Filed: March 4, 1985
    Date of Patent: April 7, 1987
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tomoyasu Inoue
  • Patent number: 4498226
    Abstract: A method for manufacturing a three-dimensional semiconductor device which is capable of preventing the stepwise disconnection of an interconnection layer and performing a high integration thereby and which comprises the steps of: forming a polycrystalline or amorphous semiconductor layer on an insulating film having an opening at a predetermined position of a first element covered on a single-crystalline semiconductor substrate having the first element; irradiating an energy beam to said semiconductor layer to grow a single crystal in a predetermined region in said semiconductor layer using as a seed crystal that part of the semiconductor substrate which contacts with semiconductor layer; and forming a second element on the grown single-crystalline semiconductor region and forming an interconnection between the first and second elements by using a part of the single-crystalline semiconductor region from said semiconductor substrate to said second element.
    Type: Grant
    Filed: August 27, 1982
    Date of Patent: February 12, 1985
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Tomoyasu Inoue, Kenji Shibata
  • Patent number: 4472729
    Abstract: A stacked semiconductor IC device is disclosed which comprises a single-crystalline semiconductor substrate having planar surfaces with different height and a slant surface, a single-crystalline semiconductive layer which is epitaxially grown from the substrate on or above the substrate, and which has planar surfaces with different height and a slant surface and a substantially uniform thickness, groups of semiconductor elements each formed on the low planar surface of the substrate and on the low planar surface of the layer, and contact wiring pattern passing through the slant portion of the layer to electrically connect the element groups.
    Type: Grant
    Filed: August 24, 1982
    Date of Patent: September 18, 1984
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Kenji Shibata, Tomoyasu Inoue