Patents by Inventor Tomoyasu Kitaura

Tomoyasu Kitaura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10734373
    Abstract: A circuit block including standard cells (1) arranged therein is provided with switch cells (20) capable of switching between electrical connection and disconnection between power supply lines (3) extending in an X-direction and power supply straps (11) extending in a Y-direction. Each of the power supply straps (11) is provided with a single switch cell (20) arranged every M sets of power supply lines (3) (M is an integer of 3 or more). In the Y-direction, the switch cells (20) are arranged at different positions in the power supply straps (11) adjacent to each other, and are arranged at the same position every M power supply straps (11) in the X-direction.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: August 4, 2020
    Assignee: SOCIONEXT INC.
    Inventors: Atsushi Okamoto, Tomoyasu Kitaura, Hirotaka Takeno
  • Patent number: 10693457
    Abstract: Power switch cells (20) respectively includes power switches (21), each of which is capable of performing switching between electrical connection and disconnection between a global power supply line (11) and a local power supply line (8) in accordance with a control signal (CTR). The power switches (21) are connected in a chain state to constitute a chain connection through which the control signal (CTR) is sequentially transmitted. A starting point switch (21a) in the chain connection has a greater distance to an edge (BE) of a region occupied by a power domain than an ending point switch (21b).
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: June 23, 2020
    Assignee: SOCIONEXT INC.
    Inventors: Atsushi Okamoto, Tomoyasu Kitaura, Hirotaka Takeno
  • Publication number: 20190123741
    Abstract: Power switch cells (20) respectively includes power switches (21), each of which is capable of performing switching between electrical connection and disconnection between a global power supply line (11) and a local power supply line (8) in accordance with a control signal (CTR). The power switches (21) are connected in a chain state to constitute a chain connection through which the control signal (CTR) is sequentially transmitted. A starting point switch (21a) in the chain connection has a greater distance to an edge (BE) of a region occupied by a power domain than an ending point switch (21b).
    Type: Application
    Filed: November 30, 2018
    Publication date: April 25, 2019
    Inventors: Atsushi OKAMOTO, Tomoyasu KITAURA, Hirotaka TAKENO
  • Publication number: 20190081029
    Abstract: A circuit block including standard cells (1) arranged therein is provided with switch cells (20) capable of switching between electrical connection and disconnection between power supply lines (3) extending in an X-direction and power supply straps (11) extending in a Y-direction. Each of the power supply straps (11) is provided with a single switch cell (20) arranged every M sets of power supply lines (3) (M is an integer of 3 or more). In the Y-direction, the switch cells (20) are arranged at different positions in the power supply straps (11) adjacent to each other, and are arranged at the same position every M power supply straps (11) in the X-direction.
    Type: Application
    Filed: November 13, 2018
    Publication date: March 14, 2019
    Inventors: Atsushi OKAMOTO, Tomoyasu KITAURA, Hirotaka TAKENO
  • Patent number: 9087171
    Abstract: A semiconductor device has: a first signal line formed in a first wiring layer formed on a semiconductor substrate, and disposed in a first direction; first and second shield lines formed in the first wiring layer, disposed on both sides of the first signal line in the first direction, and given a first fixed potential; and a plurality of third shield lines formed in a second wiring layer formed on the semiconductor substrate, disposed with a first wiring width and at a first wiring interval in a second direction almost orthogonal to the first direction in a manner to partially overlap with each of the first signal line and the first and second shield lines, and given the first fixed potential.
    Type: Grant
    Filed: September 23, 2013
    Date of Patent: July 21, 2015
    Assignee: SOCIONEXT INC.
    Inventor: Tomoyasu Kitaura
  • Publication number: 20150095871
    Abstract: A circuit design support method includes obtaining layout data that indicates positions of a plurality of clock receivers disposed in a circuit and positions of first clock wires disposed in the circuit; and calculating, by a computer, a value corresponding to lengths of wires respectively connecting the clock receivers to second clock wires on the basis of the obtained layout data, the value being calculated for each of a plurality of combinations of a count of the second clock wires and positions of the second clock wires, the second clock wires being disposed in a wiring layer of the circuit and being perpendicular to the first clock wires.
    Type: Application
    Filed: September 26, 2014
    Publication date: April 2, 2015
    Applicant: Fujitsu Optical Components Limited
    Inventor: Tomoyasu Kitaura
  • Publication number: 20140096101
    Abstract: A semiconductor device has: a first signal line formed in a first wiring layer formed on a semiconductor substrate, and disposed in a first direction; first and second shield lines formed in the first wiring layer, disposed on both sides of the first signal line in the first direction, and given a first fixed potential; and a plurality of third shield lines formed in a second wiring layer formed on the semiconductor substrate, disposed with a first wiring width and at a first wiring interval in a second direction almost orthogonal to the first direction in a manner to partially overlap with each of the first signal line and the first and second shield lines, and given the first fixed potential.
    Type: Application
    Filed: September 23, 2013
    Publication date: April 3, 2014
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventor: Tomoyasu KITAURA
  • Patent number: 7868685
    Abstract: An electric circuit device operable under a power supply includes: a circuit; a first switch connected between the power supply and the circuit; a capacitor tending to produce a first leakage current; a second switch connected between the power supply and the capacitor, the second switch producing a second leakage current when it is cut off, the second leakage current being less than the first leakage current; and a switch controller for turning on the second switch while both the first switch and the second switch are turned off, and after a first time passes for turning on the first switch.
    Type: Grant
    Filed: December 21, 2008
    Date of Patent: January 11, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Tomoyasu Kitaura
  • Publication number: 20100156503
    Abstract: An electric circuit device operable under a power supply includes: a circuit; a first switch connected between the power supply and the circuit; a capacitor tending to produce a first leakage current; a second switch connected between the power supply and the capacitor, the second switch producing a second leakage current when it is cut off, the second leakage current being less than the first leakage current; and a switch controller for turning on the second switch while both the first switch and the second switch are turned off, and after a first time passes for turning on the first switch.
    Type: Application
    Filed: December 21, 2008
    Publication date: June 24, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventor: Tomoyasu KITAURA