Patents by Inventor Tomoyasu Kudo

Tomoyasu Kudo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9012925
    Abstract: A solid-state imaging device according to embodiments of the present disclosure includes a light receiving unit, a first charge holding film, and a second charge holding film. The light receiving unit converts the incident light to an electric current. The first charge holding film is formed above the light receiving unit and holds electric charges. The second charge holding film is formed on the first charge holding film and holds electric charges. Further, concentration of oxygen in the second charge holding film is higher than concentration of oxygen in the first charge holding film.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: April 21, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaki Kamimura, Shinji Uya, Tomoyasu Kudo
  • Patent number: 8629482
    Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes implanting impurity ions to a semiconductor layer in which an electrode is embedded; forming a light absorption film which absorbs laser light at a side of the electrode to which the laser light is irradiated; and activating the impurity ions by irradiating laser light to the semiconductor layer at which the light absorption film is formed in the forming.
    Type: Grant
    Filed: June 18, 2012
    Date of Patent: January 14, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomoyasu Kudo, Kenichi Yoshino, Masaki Kamimura
  • Publication number: 20130264670
    Abstract: A solid-state imaging device according to embodiments of the present disclosure includes a light receiving unit, a first charge holding film, and a second charge holding film. The light receiving unit converts the incident light to an electric current. The first charge holding film is formed above the light receiving unit and holds electric charges. The second charge holding film is formed on the first charge holding film and holds electric charges. Further, concentration of oxygen in the second charge holding film is higher than concentration of oxygen in the first charge holding film.
    Type: Application
    Filed: March 6, 2013
    Publication date: October 10, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masaki Kamimura, Shinji Uya, Tomoyasu Kudo
  • Publication number: 20130183792
    Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes implanting impurity ions to a semiconductor layer in which an electrode is embedded; forming a light absorption film which absorbs laser light at a side of the electrode to which the laser light is irradiated; and activating the impurity ions by irradiating laser light to the semiconductor layer at which the light absorption film is formed in the forming.
    Type: Application
    Filed: June 18, 2012
    Publication date: July 18, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tomoyasu KUDO, Kenichi YOSHINO, Masaki KAMIMURA
  • Patent number: 8096805
    Abstract: A manufacturing apparatus for a semiconductor device that includes a bake chamber for a wafer with a coating film formed thereon to be baked at a predetermined temperature, a cooling chamber connected to the bake chamber, a first carrying unit for the baked wafer to be carried in the cooling chamber, a first temperature control unit for the wafer carried by the first carrying unit to be cooled down, and an unloading gate for unloading the wafer cooled down from the cooling chamber.
    Type: Grant
    Filed: November 26, 2007
    Date of Patent: January 17, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tomoyasu Kudo
  • Patent number: 7973419
    Abstract: According to an aspect of the invention, there is provided a semiconductor device including a semiconductor substrate, a p-type impurity diffusion layer formed on the semiconductor substrate, and Ni silicide formed on the diffusion layer, wherein an alignment mark for lithography is formed on the Ni silicide.
    Type: Grant
    Filed: October 18, 2006
    Date of Patent: July 5, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomoyasu Kudo, Kazutaka Ishigo
  • Publication number: 20080124947
    Abstract: A manufacturing apparatus for a semiconductor device that includes a bake chamber for a wafer with a coating film formed thereon to be baked at a predetermined temperature, a cooling chamber connected to the bake chamber, a first carrying unit for the baked wafer to be carried in the cooling chamber, a first temperature control unit for the wafer carried by the first carrying unit to be cooled down, and an unloading gate for unloading the wafer cooled down from the cooling chamber.
    Type: Application
    Filed: November 26, 2007
    Publication date: May 29, 2008
    Inventor: Tomoyasu KUDO
  • Publication number: 20070090549
    Abstract: According to an aspect of the invention, there is provided a semiconductor device including a semiconductor substrate, a p-type impurity diffusion layer formed on the semiconductor substrate, and Ni silicide formed on the diffusion layer, wherein an alignment mark for lithography is formed on the Ni silicide.
    Type: Application
    Filed: October 18, 2006
    Publication date: April 26, 2007
    Inventors: Tomoyasu Kudo, Kazutaka Ishigo