Abstract: An imaging device package includes: an imaging device chip; a substrate on which the imaging device chip is mounted; a wire that electrically connects the imaging device chip and the substrate at a peripheral edge of the substrate around the imaging device chip; a supporting body that supports an optical member with respect to the substrate; and a bonding section that bonds the supporting body to the substrate while sealing the wire and a bonding terminal of the wire at the peripheral edge of the substrate.

Abstract: Disclosed herein is a card device including a semiconductor package section having memory functions and a substrate section joined to the semiconductor package section by superposition and mounted by a variety of electronic components. The semiconductor package section includes a card-side connector section having card-side terminals for inputting and outputting information signals, and package-side terminals at a location at which the semiconductor package section is joined to the substrate section by superposition. The substrate section includes substrate-side terminals at a location at which the substrate section is connected to the semiconductor package section by superposition. The substrate section is electrically joined to the semiconductor package section by making use of the package-side terminals and the substrate-side terminals.

Abstract: A multilayer wiring substrate has a through hole that passes from a first surface through to a second surface. The multilayer wiring substrate includes an electrical connection terminal formed in at least one of an inner edge portion which is a periphery of the through hole, an outer edge portion which is an outer periphery of the substrate, and a non-edge portion, on at least one of the first surface and the second surface. The electrical connection terminal has a castellation structure that does not pass through to a surface opposite to a formation surface.

Abstract: The ON duration of an N channel MOS transistor is set based on a target voltage at a node between a resistor and a light receiving element of a photocoupler. A comparator compares the target voltage with a reference voltage at a node between a variable resistor and a resistor. A normal mode and a low frequency operation mode are switched from one to the other based on an output signal from the comparator. The resistance of the variable resistor becomes low when an input voltage from a power source is high. Even when the input voltage is high, therefore, the ON duration of the N channel MOS transistor at the transition between the normal mode and the low frequency operation mode becomes short. This reduces the switching energy in low frequency operation mode, thereby suppressing noise.

Abstract: A DC-DC converter is provided with a control circuit 6 which comprises a drive signal generator 11 for producing on-off signals to a control terminal of a MOS-FET 3 in synchronization with pulse signals VOSC from an oscillator 10; an intermittent controller 12 for producing a control signal VC1 to drive signal generator 11 in response to the level of detection signal from an output voltage detector 5 to convert MOS-FET 3 to the intermittent operation during the light load period; and a power control circuit 16 for ceasing power supply VCC to oscillator 10 in response to control signal VC1 from intermittent controller 12 to stop production of pulse signal VOSC from oscillator 10 for the cessation term of MOS-FET 3 during the intermittent operation.

Abstract: Management information is read from an information storage medium having the management information recorded thereon, the management information including track number information imparted to at least one track and group management information for managing as selective recording information one or a plurality of tracks as one group. Judgment is then made upon whether the group management information is included in that management information. A display mode is changed depending on a case where the group management information is recorded and a case where it is not recorded, and it is then displayed in a displaying device.

Abstract: Management information is read from an information storage medium having the management information recorded thereon, the management information including track number information imparted to at least one track and group management information for managing as selective recording information one or a plurality of tracks as one group. Judgment is then made upon whether the group management information is included in that management information. A display mode is changed depending on a case where the group management information is recorded and a case where it is not recorded, and it is then displayed in a displaying device.

Abstract: By an NMOS (22) being switched on or off, a direct-current voltage E0 is charged in a capacitor (24), and a DC/DC converting circuit (30) charges a direct-current output voltage V0 to be supplied to a load L in a capacitor (34). A load state detection circuit (40) determines whether the load L is in a lightly loaded state or in a non-lightly loaded state, and outputs a signal (S40) as a determination signal. When the load state detection circuit (40) outputs a signal (S41) of “L” as a signal representing that it is a lightly loaded state, a time period setting circuit (41) outputs a signal (S41) of “L” after a preset time period elapses. A PFC on/off switching circuit (42) is supplied with the signal (S41) of “L”, and outputs a control signal (S25) of “L” to a power factor improvement circuit (20). Accordingly, in the case where the load L enters a lightly loaded state, the operation of the power factor improvement circuit (20) is stopped when the preset time elapses.

Abstract: An AC voltage generated by an AC power source 1 is rectified by a full-wave rectifying circuit 2, which generates a rectified voltage. An internal regulator 33 performs waveform shaping of the rectified voltage. A comparator 42 compares the rectified voltage output from the internal regulator 33 with a reference voltage V1 and detects a period in which the rectified voltage exceeds the reference voltage V1. According to an output signal of the comparator 42, a determination signal generation circuit 50 determines the power source voltage supplied form the AC power source 1 and generates a determination signal. Accordingly, there is no need of a capacitor, etc. for detecting the peak value of the rectified voltage, and it is possible to reduce the size and cost of an AC voltage detection circuit.

Abstract: When a detection device detects any kind of change regarding track recording after the start of the track recording, a grouping instruction is given to information attaching and generating device. Then, the information attaching and generating device attaches the same group name information to a group, in which a track where the recording has been started in an information recording medium to a track recorded at the point when the grouping instruction has been received are made to be the same group, and group control information is generated. Therefore, since the grouping is automatically performed by any kind of change regarding the track recording, a user can omit the operation that he/she performs the grouping by himself/herself, and thus the operation load of the user can be reduced.

Abstract: Management information is read from an information storage medium having the management information recorded thereon, the management information including track number information imparted to at least one track and group management information for managing as selective recording information one or a plurality of tracks as one group. Judgment is then made upon whether the group management information is included in that management information. A display mode is changed depending on a case where the group management information is recorded and a case where it is not recorded, and it is then displayed in a displaying device.

Abstract: Management information is read from an information storage medium having the management information recorded thereon, the management information including track number information imparted to at least one track and group management information for managing as selective recording information one or a plurality of tracks as one group. Judgment is then made upon whether the group management information is included in that management information. A display mode is changed depending on a case where the group management information is recorded and a case where it is not recorded, and it is then displayed in a displaying device.

Abstract: A DC-DC converter is provided with a control circuit 6 which comprises a drive signal generator 11 for producing on-off signals to a control terminal of a MOS-FET 3 in synchronization with pulse signals VOSC from an oscillator 10; an intermittent controller 12 for producing a control signal VC1 to drive signal generator 11 in response to the level of detection signal from an output voltage detector 5 to convert MOS-FET 3 to the intermittent operation during the light load period; and a power control circuit 16 for ceasing power supply VCC to oscillator 10 in response to control signal VC1 from intermittent controller 12 to stop production of pulse signal VOSC from oscillator 10 for the cessation term of MOS-FET 3 during the intermittent operation.

Abstract: A transformer has a primary winding connected between a pair of dc input terminals via a voltage regulator switch, and a secondary winding connected between a pair of dc output terminals via a rectifying and smoothing circuit. The dc output voltage being applied to the load from the dc output terminals is detected, and the detector output voltage dually divided, to provide two feedback signals of different magnitudes. One of these feedback signals is used by a mode selector circuit to provide a mode select signal for causing the voltage regulator switch to be driven continuously under normal load, and at intervals under light load. Delivered to a conduction terminator circuit, the other feedback signal is thereby used to provide conduction terminator pulses for terminating conduction through the voltage regulator switch.

Abstract: The ON duration of an N channel MOS transistor is set based on a target voltage at a node between a resistor and a light receiving element of a photocoupler. A comparator compares the target voltage with a reference voltage at a node between a variable resistor and a resistor. A normal mode and a low frequency operation mode are switched from one to the other based on an output signal from the comparator. The resistance of the variable resistor becomes low when an input voltage from a power source is high. Even when the input voltage is high, therefore, the ON duration of the N channel MOS transistor at the transition between the normal mode and the low frequency operation mode becomes short. This reduces the switching energy in low frequency operation mode, thereby suppressing noise.

Abstract: By an NMOS (22) being switched on or off, a direct-current voltage E0 is charged in a capacitor (24), and a DC/DC converting circuit (30) charges a direct-current output voltage V0 to be supplied to a load L in a capacitor (34). A load state detection circuit (40) determines whether the load L is in a lightly loaded state or in a non-lightly loaded state, and outputs a signal (S40) as a determination signal. When the load state detection circuit (40) outputs a signal (S41) of “L” as a signal representing that it is a lightly loaded state, a time period setting circuit (41) outputs a signal (S41) of “L” after a preset time period elapses. A PFC on/off switching circuit (42) is supplied with the signal (S41) of “L”, and outputs a control signal (S25) of “L” to a power factor improvement circuit (20). Accordingly, in the case where the load L enters a lightly loaded state, the operation of the power factor improvement circuit (20) is stopped when the preset time elapses.

Abstract: When an AC power source (1) is turned on, energy is accumulated in a backup capacitor (63) by an energy supply circuit (64). An internal power source (65) supplies the energy accumulated in the capacitor (63) to a control unit (49). Thus, a power factor improvement circuit (40-2) operates. When the power factor improvement circuit (40-2) operates to output a predetermined voltage, an output voltage detection circuit (67) detects the voltage, and switches the internal power source (66) on. The turned on internal power source (66) supplies the energy in the capacitor (63) to a control unit (56) to operate a DC/DC conversion circuit (50). In this way, by operating the DC/DC conversion circuit (50) after operating the power factor improvement circuit (40-2), the capacity of the capacitor (63) can be reduced.

Abstract: A transformer has a primary winding connected between a pair of dc input terminals via a switch, a secondary winding connected between a pair of output terminals via a first rectifying and smoothing circuit, and a tertiary winding connected to a second rectifying and smoothing circuit for feeding a switch control circuit. Included in the switch control circuit is a switch control pulse generator circuit whereby the switch is driven to provide a constant dc voltage at the output terminals. A mode selector circuit is connected to the switch control pulse generator circuit to cause the switch to be driven continuously under normal load, and at intervals under light load. The intermittent driving of the switch is suspended, and the switch driven continuously, in the event of a drop in the output voltage of the second rectifying and smoothing circuit to a predefined value during operation in light load mode.

Abstract: A transformer has a primary winding connected between a pair of dc input terminals via a voltage regulator switch, and a secondary winding connected between a pair of dc output terminals via a rectifying and smoothing circuit. The dc output voltage being applied to the load from the dc output terminals is detected, and the detector output voltage dually divided, to provide two feedback signals of different magnitudes. One of these feedback signals is used by a mode selector circuit to provide a mode select signal for causing the voltage regulator switch to be driven continuously under normal load, and at intervals under light load. Delivered to a conduction terminator circuit, the other feedback signal is thereby used to provide conduction terminator pulses for terminating conduction through the voltage regulator switch.

Abstract: An AC voltage generated by an AC power source 1 is rectified by a full-wave rectifying circuit 2, which generates a rectified voltage. An internal regulator 33 performs waveform shaping of the rectified voltage. A comparator 42 compares the rectified voltage output from the internal regulator 33 with a reference voltage V1 and detects a period in which the rectified voltage exceeds the reference voltage V1. According to an output signal of the comparator 42, a determination signal generation circuit 50 determines the power source voltage supplied form the AC power source 1 and generates a determination signal. Accordingly, there is no need of a capacitor, etc. for detecting the peak value of the rectified voltage, and it is possible to reduce the size and cost of an AC voltage detection circuit.