Abstract: In a semiconductor device having a heterojunction type superjunction structure, a drain portion and a source portion are electrically connected to one of a two-dimensional electron gas layer and a two-dimensional hole gas layer, and a gate portion is prevented by an insulating region from directly contacting the one of the two-dimensional election gas layer and the two-dimensional hole gas layer.

Abstract: In a semiconductor device having a heterojunction type superjunction structure, a drain portion and a source portion are electrically connected to one of a two-dimensional electron gas layer and a two-dimensional hole gas layer, and a gate portion is prevented by an insulating region from directly contacting the one of the two-dimensional election gas layer and the two-dimensional hole gas layer.

Abstract: A semiconductor apparatus (10) includes: a layered structure (100) that includes double junction structures that have a first junction (151, 153) where a wide-bandgap layer (102, 104) and a narrow-bandgap layer (101, 103, 105) are layered on each other and a second junction (152, 154) where a narrow-bandgap layer (101, 103, 105) and a wide-bandgap layer (102, 104) are layered on each other, and electrode semiconductor layers (110, 120) are joined to each layer of the layered structure. Each double junction structure includes a pair of a first region (131, 133) that has negative fixed charge and a second region (132, 134) that has positive fixed charge. The first region is closer to the first junction than to a center of the wide-bandgap layer. The second region is closer to the second junction than to the center of the wide-bandgap layer. A 2DEG or a 2DHG is formed at each junction. The semiconductor apparatus functions as an electric energy storage device such as a capacitor.

Abstract: A semiconductor apparatus (10) includes: a layered structure (100) that includes double junction structures that have a first junction (151, 153) where a wide-bandgap layer (102, 104) and a narrow-bandgap layer (101, 103, 105) are layered on each other and a second junction (152, 154) where a narrow-bandgap layer (101, 103, 105) and a wide-bandgap layer (102, 104) are layered on each other, and electrode semiconductor layers (110, 120) are joined to each layer of the layered structure. Each double junction structure includes a pair of a first region (131, 133) that has negative fixed charge and a second region (132, 134) that has positive fixed charge. The first region is closer to the first junction than to a center of the wide-bandgap layer. The second region is closer to the second junction than to the center of the wide-bandgap layer. A 2DEG or a 2DHG is formed at each junction. The semiconductor apparatus functions as an electric energy storage device such as a capacitor.

Abstract: A mobile object detecting apparatus includes first radiation detecting means; and second radiation detecting means for radiating an electromagnetic wave having the same frequency as the electromagnetic wave radiated by the first radiation detecting means such that the radiated electromagnetic wave passes near a point in the first radiation detecting means from which the electromagnetic wave is radiated, and detecting a standing wave which is generated due to reflection of the radiated electromagnetic wave at an object; wherein a distance, over which the electromagnetic wave radiated by the first radiation detecting means travels until it reaches near the first radiation detecting means, corresponds to a distance of an integral multiple of a wave length of a half cycle of the electromagnetic waves radiated by the radiation detecting means plus a wave length of a predetermined period which is smaller than the half cycle.

Abstract: A mobile object detecting apparatus includes first radiation detecting means ; and second radiation detecting means for radiating an electromagnetic wave having the same frequency as the electromagnetic wave radiated by the first radiation detecting means such that the radiated electromagnetic wave passes near a point in the first radiation detecting means from which the electromagnetic wave is radiated, and detecting a standing wave which is generated due to reflection of the radiated electromagnetic wave at an object; wherein a distance, over which the electromagnetic wave radiated by the first radiation detecting means travels until it reaches near the first radiation detecting means, corresponds to a distance of an integral multiple of a wave length of a half cycle of the electromagnetic waves radiated by the radiation detecting means plus a wave length of a predetermined period which is smaller than the half cycle.

Abstract: With conventional device, the quantity of complex defects differs with each semiconductor device because the concentration of impurities intrinsically contained differs for each silicon wafer. Consequently, there is an undesirable variation in characteristics among the semiconductor devices. The invention provides a method for manufacturing PIN type diode which comprises an intermediate semiconductor region in which complex defects are formed. The method comprises introducing impurities (for example, carbon), which are the same kind of impurities intrinsically contained in the intermediate semiconductor region, into the intermediate semiconductor region, and irradiating the intermediate semiconductor region with helium ions to form point defects.

Abstract: With conventional device, the quantity of complex defects differs with each semiconductor device because the concentration of impurities intrinsically contained differs for each silicon wafer. Consequently, there is an undesirable variation in characteristics among the semiconductor devices. The invention provides a method for manufacturing PIN type diode which comprises an intermediate semiconductor region in which complex defects are formed. The method comprises introducing impurities (for example, carbon), which are the sane kind of impurities intrinsically contained in the intermediate semiconductor region, into the intermediate semiconductor region, and irradiating the intermediate semiconductor region with helium ions to form point defects.

Abstract: With conventional device, the quantity of complex defects differs with each semiconductor device because the concentration of impurities intrinsically contained differs for each silicon wafer. Consequently, there is an undesirable variation in characteristics among the semiconductor devices. The invention provides a method for manufacturing PIN type diode which comprises an intermediate semiconductor region in which complex defects are formed. The method comprises introducing impurities (for example, carbon), which are the same kind of impurities intrinsically contained in the intermediate semiconductor region, into the intermediate semiconductor region, and irradiating the intermediate semiconductor region with helium ions to form point defects.

Abstract: With conventional device, the quantity of complex defects differs with each semiconductor device because the concentration of impurities intrinsically contained differs for each silicon wafer. Consequently, there is an undesirable variation in characteristics among the semiconductor devices. The invention provides a method for manufacturing PIN type diode which comprises an intermediate semiconductor region in which complex defects are formed. The method comprises introducing impurities (for example, carbon), which are the sane kind of impurities intrinsically contained in the intermediate semiconductor region, into the intermediate semiconductor region, and irradiating the intermediate semiconductor region with helium ions to form point defects.

Abstract: An object of this invention is to provide a buried gate-type semiconductor device in which its gate interval is minimized so as to improve channel concentration thereby realizing low ON-resistance, voltage-resistance depression due to convergence of electrical fields in the vicinity of the bottom of the gate is prevented and further prevention of voltage-resistance depression and OFF characteristic are achieved at the same time. A plurality of gate electrodes 106 each having a rectangular section are disposed in its plan section. The interval 106T between the long sides of the gate electrodes 106 is made shorter than the interval 106S between the short sides thereof. Further, a belt-like contact opening 108 is provided between the short sides of the gate electrode 106, so that P+ source region 100 and N+ source region 104 are in contact with a source electrode. Consequently, the interval 106T between the long sides of the gate electrode 106 can be set up regardless of the width of the contact opening 108.

Abstract: It is intended to provide a field-effective-type semiconductor device that can let low ON-resistance and non-excessive short-circuit current go together by effectively using its channel width and prevents device from destruction. In a field-effective-type semiconductor device, a semiconductor region arranged between gate electrodes 106 has stripe-patterned structure consisting of an N+ emitter region 104 and a P emitter region. The P emitter region is constituted by P channel region 103 of low concentration and P+ emitter region 100 of high concentration. The N+ emitter region 104, the P channel region 103, and the P+ emitter region 100 are in contact with the emitter electrode 109. Thereby, a channel width X is limited to the extent that is enough for ON current under normal operation state. That is, low ON-resistance and not excessive short-circuit current can go together in the field-effective-type semiconductor device.

Abstract: It is intended to provide a high withstand voltage field effect type semiconductor device that relaxes electric fields in a semiconductor substrate without thickening thickness of a drift region and achieves withstand-ability against high voltage without sacrificing ON-voltage, switch-OFF characteristics, and miniaturization. A field effective type semiconductor device comprises emitter regions 100, 104 and gate electrodes 106 and the like on a surface (upper surface in FIG. 2), a collector region 101 and the like on the other surface (lower surface in FIG. 2), wherein N? field dispersion regions 111 of low impurity concentration are arranged between P body regions 103 facing to gate electrodes 106 and an N drift region 102 below P body regions 103. Thereby, electric field between collector and emitter is relaxed and high withstand voltage field effect type semiconductor device is realized.

Abstract: A trench gate type semiconductor device has an ON resistance that has been reduced. The device has a drain electrode on one side of the substrate and has a drift region, channel region, source region, and a source electrode on the other side. The channel region is sandwiched between a trench gate region covered with insulating film. Current passes when a positive bias voltage is applied to the trench region, and current is cut off when a negative bias voltage is applied.

Abstract: It is intended to provide a high withstand voltage field effect type semiconductor device that relaxes electric fields in a semiconductor substrate without thickening thickness of a drift region and achieves withstand-ability against high voltage without sacrificing ON-voltage, switch-OFF characteristics, and miniaturization. A field effective type semiconductor device comprises emitter regions 100, 104 and gate electrodes 106 and the like on a surface (upper surface in FIG. 2), a collector region 101 and the like on the other surface (lower surface in FIG. 2), wherein N− field dispersion regions 111 of low impurity concentration are arranged between P body regions 103 facing to gate electrodes 106 and an N drift region 102 below P body regions 103. Thereby, electric field between collector and emitter is relaxed and high withstand voltage field effect type semiconductor device is realized.

Abstract: The present invention provides a semiconductor device wherein the turning-off time thereof can be reduced substantially and, at the same time, the turned-on resistance thereof can also be prevented effectively from increasing as well. Lattice defects are distributed at a high concentration in a defect region an area in close proximity to the boundary surface between an n drift region and a p+ substrate. The half-value width of the distribution is set at a value which is large enough for the defect region to include a non-depletion region in the n drift region. However, the defect region is not spread to cover a diffusion layer. In this way, the turning-off time of the semiconductor device can be reduced considerably without being accompanied by an increase in turned-on resistance thereof. In addition, by employing an absorber with an uneven surface, the distribution of lattice defects can be obtained by carrying out radiation of ions at only one time.

Abstract: An object of this invention is to provide a buried gate-type semiconductor device in which its gate interval is minimized so as to improve channel concentration thereby realizing low ON-resistance, voltage-resistance depression due to convergence of electrical fields in the vicinity of the bottom of the gate is prevented and further prevention of voltage-resistance depression and OFF characteristic are achieved at the same time. A plurality of gate electrodes 106 each having a rectangular section are disposed in its plan section. The interval 106T between the long sides of the gate electrodes 106 is made shorter than the interval 106S between the short sides thereof. Further, a belt-like contact opening 108 is provided between the short sides of the gate electrode 106, so that P+ source region 100 and N+ source region 104 are in contact with a source electrode.

Abstract: It is intended to provide a field-effective-type semiconductor device that can let low ON-resistance and non-excessive short-circuit current go together by effectively using its channel width and prevents device from destruction. In a field-effective-type semiconductor device, a semiconductor region arranged between gate electrodes 106 has stripe-patterned structure consisting of an N+ emitter region 104 and a P emitter region. The P emitter region is constituted by P channel region 103 of low concentration and P+ emitter region 100 of high concentration. The N+ emitter region 104, the P channel region 103, and the P+ emitter region 100 are in contact with the emitter electrode 109. Thereby, a channel width X is limited to the extent that is enough for ON current under normal operation state. That is, low ON-resistance and not excessive short-circuit current can go together in the field-effective-type semiconductor device.

Abstract: In a semiconductor device having high voltage resistance and low ON voltage characteristics, charge-storage regions (insulation layer) are formed in a drift region. Formed above the drift region are a channel region, an emitter region, trench-type gate electrodes, and an emitter electrode. Strips of the insulation layer extend in a direction intersecting a direction of extension of the gate electrodes, and form a stripe pattern. The insulation layer curbs extraction of holes into the channel region. Openings in the stripe pattern of the insulation layer form depletion layers.

Abstract: The present invention provides a semiconductor device wherein the turning-off time thereof can be reduced substantially and, at the same time, the turned-on resistance thereof can also be prevented effectively from increasing as well. Lattice defects are distributed at a high concentration in a defect region an area in close proximity to the boundary surface between an n drift region and a p+ substrate. The half-value width of the distribution is set at a value which is large enough for the defect region to include a non-depletion region in the n drift region. However, the defect region is not spread to cover a diffusion layer. In this way, the turning-off time of the semiconductor device can be reduced considerably without being accompanied by an increase in turned-on resistance thereof. In addition, by employing an absorber with an uneven surface, the distribution of lattice defects can be obtained by carrying out radiation of ions at only one time.