Patents by Inventor Tomoyuki Fukuda

Tomoyuki Fukuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9146204
    Abstract: An X-ray analyzing apparatus is such that a diffraction pattern, in which the intensity of secondary X-rays (4) is associated with the angle of rotation of a sample (S), is stored; while the pattern is scanned by a line of the secondary X-rays (4) intensity in a direction of highness and lowness, points on the pattern having not higher intensity than the line are taken as candidate points; respective angles of rotation of the candidate points, when the maximum value of the difference in angle of rotation between the neighboring candidate points attains a predetermined angle, are stored; depending on coordinates of a point of measurement, the angle of rotation proximate to the coordinates is read out from the stored angles; and the sample (S) is set to the read out angle and the point of measurement is arranged within the field of view (V) of a detector (7).
    Type: Grant
    Filed: August 6, 2012
    Date of Patent: September 29, 2015
    Assignee: Rigaku Corporation
    Inventors: Tomoyuki Fukuda, Kosuke Shimizu, Akihiro Ikeshita
  • Publication number: 20150233845
    Abstract: An X-ray analyzing apparatus is such that a diffraction pattern, in which the intensity of secondary X-rays (4) is associated with the angle of rotation of a sample (S), is stored; while the pattern is scanned by a line of the secondary X-rays (4) intensity in a direction of highness and lowness, points on the pattern having not higher intensity than the line are taken as candidate points; respective angles of rotation of the candidate points, when the maximum value of the difference in angle of rotation between the neighboring candidate points attains a predetermined angle, are stored; depending on coordinates of a point of measurement, the angle of rotation proximate to the coordinates is read out from the stored angles; and the sample (S) is set to the read out angle and the point of measurement is arranged within the field of view (V) of a detector (7).
    Type: Application
    Filed: August 6, 2012
    Publication date: August 20, 2015
    Applicant: RIGAKU CORPORATION
    Inventors: Tomoyuki Fukuda, Kosuke Shimizu, Akihiro Ikeshita
  • Patent number: 8614119
    Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: December 24, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Tomoyuki Fukuda, Yoshihiro Kubota, Hiroshi Ohtsubo, Yuichi Asano
  • Patent number: 8614505
    Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: December 24, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Tomoyuki Fukuda, Yoshihiro Kubota, Hiroshi Ohtsubo, Yuichi Asano
  • Patent number: 8564108
    Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: October 22, 2013
    Assignee: Fujtsu Semiconductor Limited
    Inventors: Tomoyuki Fukuda, Yoshihiro Kubota, Hiroshi Ohtsubo, Yuichi Asano
  • Patent number: 8523391
    Abstract: A flat light source apparatus has a light source board which comprises unit boards, each unit board having a printed circuit board and a light source formed on the printed circuit board, wherein the unit boards are arranged adjacent to each other at least in one direction, and any pair of the unit boards adjacent to each other is integrated by a connecting portion provided therebetween. The apparatus also has a main wire which extends along a plane of the light source board, wherein the main wire extends between adjacent unit boards via the connecting portion such that all of the unit boards are electrically connected to each other by the main wire. The apparatus further has a branch wire for supplying electric power to the light source, the branch wire being provided in each unit board and branching from the main wire in each unit board.
    Type: Grant
    Filed: February 3, 2006
    Date of Patent: September 3, 2013
    Assignee: NEC Corporation
    Inventors: Masahiro Ishizuka, Katsuyuki Okimura, Yoshinori Ueji, Ryuichiro Morinaka, Naoki Tatsumi, Tomoyuki Fukuda
  • Patent number: 8345034
    Abstract: A circuit configuration for realizing high impedance in an address drive circuit is provided in order to reduce the number of recovery switches without reducing power recovery efficiency. A mechanism for realizing the high impedance in an address drive circuit during a sustain period of a plasma display panel is provided. By achieving the high impedance, capacitance coupling between an X electrode and an address electrode and between a Y electrode and an address electrode can be cancelled, and a power recovery circuit can be simplified without reducing the power recovery efficiency.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: January 1, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Tomoyuki Fukuda, Nobuaki Kabuto, Junichi Yokoyama, Hisafumi Imura
  • Publication number: 20120319264
    Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.
    Type: Application
    Filed: August 28, 2012
    Publication date: December 20, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Tomoyuki Fukuda, Yoshihiro Kubota, Hiroshi Ohtsubo, Yuichi Asano
  • Publication number: 20120322209
    Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.
    Type: Application
    Filed: August 28, 2012
    Publication date: December 20, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Tomoyuki Fukuda, Yoshihiro Kubota, Hiroshi Ohtsubo, Yuichi Asano
  • Publication number: 20120319275
    Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.
    Type: Application
    Filed: August 28, 2012
    Publication date: December 20, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Tomoyuki Fukuda, Yoshihiro Kubota, Hiroshi Ohtsubo, Yuichi Asano
  • Patent number: 8278743
    Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.
    Type: Grant
    Filed: February 9, 2011
    Date of Patent: October 2, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Tomoyuki Fukuda, Yoshihiro Kubota, Hiroshi Ohtsubo, Yuichi Asano
  • Publication number: 20110316131
    Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.
    Type: Application
    Filed: February 9, 2011
    Publication date: December 29, 2011
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Tomoyuki Fukuda, Yoshihiro Kubota, Hiroshi Ohtsubo, Yuichi Asano
  • Publication number: 20100264729
    Abstract: [Problems to be Solved] In technology for identifying the position of an indoor terminal with high accuracy, the cost for installing a transmitter is high for the introduction of the position identifying technique which uses a transmitter to send a weak electric wave such as in Bluetooth, RFID, and the like, or an emitter to emit an infrared ray. [Means to Solve the Problems] Power is acquired from the existing lighting equipment to operate the transmitter which sends a weak electric wave such as in Bluetooth, RFID, and the like, or an emitter which emits an infrared ray.
    Type: Application
    Filed: December 22, 2006
    Publication date: October 21, 2010
    Applicants: NEC CORPORATION, NEC LIGHTING, LTD.
    Inventors: Junichi Matsuda, Tomoyuki Fukuda, Shinichi Hotta
  • Publication number: 20090268470
    Abstract: A reduced size LED lamp includes: a cap of the type GX53 that meets IEC standards; a substrate attached to the cap, which an LED is mounted on; and a light emitting surface cover case attached to the cap so as to cover the substrate.
    Type: Application
    Filed: November 14, 2006
    Publication date: October 29, 2009
    Applicant: NEC LIGHTING, LTD.
    Inventors: Katsuyuki Okimura, Tomoyuki Fukuda
  • Publication number: 20090153065
    Abstract: A circuit configuration for realizing high impedance in an address drive circuit is provided in order to reduce the number of recovery switches without reducing power recovery efficiency. A mechanism for realizing the high impedance in an address drive circuit during a sustain period of a plasma display panel is provided. By achieving the high impedance, capacitance coupling between an X electrode and an address electrode and between a Y electrode and an address electrode can be cancelled, and a power recovery circuit can be simplified without reducing the power recovery efficiency.
    Type: Application
    Filed: December 12, 2008
    Publication date: June 18, 2009
    Inventors: Tomoyuki FUKUDA, Nobuaki Kabuto, Junichi Yokoyama, Hisafumi Imura
  • Publication number: 20070101160
    Abstract: Many different key data items can be prepared even if the memory capacity of a key data setting unit incorporated in a content decryption unit. Partial content data items to be successively read are stored in an accumulation medium, encrypted with corresponding key data items. There are provided a key data table which stores the key data items, a read processing section for reading, from the accumulation medium, the partial content data items, a decryption unit for decrypting the read partial content data items, and a set-key selection section for reading, from the key data table, a key data item for decrypting a partial content data item to be decrypted, and a key data item for decrypting a partial content data item to be processed next at least, the set-key selection section also setting the read key data items in the decryption unit.
    Type: Application
    Filed: October 4, 2006
    Publication date: May 3, 2007
    Inventors: Hitoshi YOSHIDA, Tomoyuki Fukuda, Masahiko Mawatari
  • Publication number: 20060233365
    Abstract: According to one embodiment, a clock generating unit configured to generate a clock having a predetermined frequency, an input value generating unit configured to generate an input value for predetermined encryption algorithm based on a generated clock, and a calculation processing unit configured to generate random number data by executing the encryption algorithm based on a generated input value are integrated, and a clock and an input value are enclosed inside the integrated circuit so as to be unobservable from the outside of the integrated circuit.
    Type: Application
    Filed: April 6, 2006
    Publication date: October 19, 2006
    Inventors: Katsuya Ohno, Tomoyuki Fukuda
  • Publication number: 20060221608
    Abstract: A flat light source apparatus has a light source board which comprises unit boards, each unit board having a printed circuit board and a light source formed on the printed circuit board, wherein the unit boards are arranged adjacent to each other at least in one direction, and any pair of the unit boards adjacent to each other is integrated by a connecting portion provided therebetween. The apparatus also has a main wire which extends along a plane of the light source board, wherein the main wire extends between adjacent unit boards via the connecting portion such that all of the unit boards are electrically connected to each other by the main wire. The apparatus further has a branch wire for supplying electric power to the light source, the branch wire being provided in each unit board and branching from the main wire in each unit board.
    Type: Application
    Filed: February 3, 2006
    Publication date: October 5, 2006
    Inventors: Masahiro Ishizuka, Katsuyuki Okimura, Yoshinori Ueji, Ryuichiro Morinaka, Naoki Tatsumi, Tomoyuki Fukuda
  • Publication number: 20060132324
    Abstract: The present invention determines whether received operation information is addressed to its own apparatus and, if such is the case, executes processing based on a command included in the operation information and, otherwise, packetizes the operation information and outputs it to a network.
    Type: Application
    Filed: November 23, 2005
    Publication date: June 22, 2006
    Inventors: Tomoyuki Fukuda, Shinichi Matsuki
  • Patent number: 6472763
    Abstract: A conductive electrode pad is formed on a partial area of an insulating surface. An insulating film covers the electrode pad. The insulating film has an opening exposing at least a partial upper surface of the electrode pad. A barrier layer of conductive material is formed on the partial upper surface exposed on the bottom of the opening and on the surface of the insulating film near the opening. A conductive bump is adhered to the barrier layer. A step is formed on the surface of a layer under the barrier layer between an outer periphery of the barrier layer and an outer periphery of the opening.
    Type: Grant
    Filed: November 29, 2000
    Date of Patent: October 29, 2002
    Assignee: Fujitsu Limited
    Inventors: Tomoyuki Fukuda, Eiji Watanabe