Patents by Inventor Tomoyuki FUNABASAMA

Tomoyuki FUNABASAMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240097040
    Abstract: A semiconductor device is provided with a substrate, a first transistor, and a second transistor. The first transistor has a first diffusion layer region, a second diffusion layer region, a first gate insulating film, a first gate electrode, and a first silicide layer. The first silicide layer is provided on the first diffusion layer region and the second diffusion layer region. The second transistor has a third diffusion layer region, a fourth diffusion layer region, a second gate insulating film, a second gate electrode, and a second silicide layer. The second silicide layer is provided on the third diffusion layer region and the fourth diffusion layer region. A distance between the first silicide layer and the first gate insulating film is larger than a distance between the second silicide layer and the second gate insulating film.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 21, 2024
    Applicant: Kioxia Corporation
    Inventor: Tomoyuki FUNABASAMA
  • Publication number: 20230307540
    Abstract: A semiconductor device comprises a transistor. The transistor includes: a gate insulating film formed on a semiconductor substrate; a gate electrode formed on the gate insulating film and containing germanium at least in an upper region of the electrode; a source region formed in the semiconductor substrate; and a drain region formed in the semiconductor substrate.
    Type: Application
    Filed: August 30, 2022
    Publication date: September 28, 2023
    Applicant: Kioxia Corporation
    Inventors: Tomoyuki FUNABASAMA, Toshitaka MIYATA
  • Publication number: 20230078873
    Abstract: A semiconductor device includes a first semiconductor layer, a second semiconductor layer provided on the first semiconductor layer, a third semiconductor layer, a gate electrode, a first layer, and an insulating layer. The first and second semiconductor layers have first and second conductivity types. The third semiconductor layer has the second conductivity type, and is provided on the first semiconductor layer and disposed side-by-side with the second semiconductor layer in a first direction. The gate electrode is provided on the first semiconductor layer and between the second and third semiconductor layers. The first layer has a lower impurity concentration than the second semiconductor layer, is provided on the first semiconductor layer and, at one end thereof, is in contact with the second semiconductor layer. The insulating layer is provided on the first layer and, at one end thereof, is in contact with the second semiconductor layer.
    Type: Application
    Filed: March 4, 2022
    Publication date: March 16, 2023
    Inventor: Tomoyuki FUNABASAMA