Abstract: A storage system that can achieve a cryptographic operation circuit that supports multiple types of cryptographic operation formats. The cryptographic operation circuit is provided that encrypts data according to the format determined by the processor based on a request by the host terminal for writing the data into the storage device, and decrypts the encrypted data on the data stored in the storage device according to the format determined by the processor based on a request by the host terminal for reading the data from the storage device.

Abstract: In a compression mode in which plaintext data is input, and compressed, a first code that is an error detection code is generated with respect to the plaintext data, and compressed. A circuit generates restored plaintext data in which the compressed data is decompressed, for confirming successfulness. A second code that is an error detection code is generated with respect to the restored plaintext data and is compared with the first code. In a case where the first code and the second code agree, the compressed data and the first or second code are output. In a decompression mode, plaintext data is generated in which the input compressed data is decompressed. A third code that is an error detection code is generated with respect to the plaintext data and is compared with an input code, and when the input code and the third code agree, the plaintext data is output.

Abstract: A storage system that can achieve a cryptographic operation circuit that supports multiple types of cryptographic operation formats. The cryptographic operation circuit is provided that encrypts data according to the format determined by the processor based on a request by the host terminal for writing the data into the storage device, and decrypts the encrypted data on the data stored in the storage device according to the format determined by the processor based on a request by the host terminal for reading the data from the storage device.

Abstract: A storage system that can achieve a cryptographic operation circuit that supports multiple types of cryptographic operation formats. The cryptographic operation circuit is provided that encrypts data according to the format determined by the processor based on a request by the host terminal for writing the data into the storage device, and decrypts the encrypted data on the data stored in the storage device according to the format determined by the processor based on a request by the host terminal for reading the data from the storage device.

Abstract: An FPGA includes a CRAM that records configuration data for defining a circuit configuration, a main circuit unit of which the circuit configuration is determined according to the configuration data, and an error detection unit that executes memory check processing of detecting whether or not any error is present in the configuration data. A control unit causes the main circuit unit to sequentially execute a plurality of sub-processing steps obtained by segmenting predetermined processing upon receiving a query requesting execution of the predetermined processing to execute the predetermined processing and enables the error detection unit to execute the memory check processing for each of the sub-processing steps.