Patents by Inventor Tomoyuki Kanayama

Tomoyuki Kanayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10348551
    Abstract: An information processing apparatus includes a communication apparatus and a different communication apparatus connected to the communication apparatus via a plurality of transmission paths. The communication apparatus includes a transmitting unit and a control unit. In response to designation of a transmission path targeted for diagnosis, selected amongst the transmission paths while the communication apparatus is in a state capable of data communication with the different communication apparatus using the transmission paths, the transmitting unit transmits a test signal to the targeted transmission path while the state capable of data communication with the different communication apparatus is maintained using remaining transmission paths of the transmission paths other than the targeted transmission path.
    Type: Grant
    Filed: August 16, 2017
    Date of Patent: July 9, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Kazuko Sasaki, Tomoyuki Kanayama, Takanori Ishii, Yohei Nuno
  • Publication number: 20190073147
    Abstract: A control device includes a nonvolatile memory, a first processor, a first volatile memory coupled to the first processor, a second processor, and a second volatile memory coupled to the second processor, wherein the first processor is configured to transmit first data stored in the first volatile memory to the second processor by using electric power supplied from a backup power supply, the second processor is configured to store the first data in the second volatile memory, after storing the first data in the second volatile memory, the backup power supply stops supplying the electric power to at least one of the first volatile memory and the first processor, and the second processor is configured to store, in the nonvolatile memory, the first data stored in the second volatile memory.
    Type: Application
    Filed: August 30, 2018
    Publication date: March 7, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Yuichi Ogawa, Tomoyuki Kanayama, Yuzo KORI, Tomoharu Muro
  • Publication number: 20180335827
    Abstract: An apparatus includes a memory configured to store target data including a data main-body and management information relating to the data main-body. The apparatus controls on and off of power supply to the memory in units of a power-supply block that is a memory block for storing a piece of data included in the data main-body or included in the management information. The apparatus turns off power supply to plural power-supply blocks in the memory, each of which stores a piece of data included in the data main-body. When a first access to the management information occurs, based on position information included in the management information, the apparatus turns on power supply to a first power-supply block that is a memory block storing a piece of data included in the data main-body which is to be accessed in connection with the first access.
    Type: Application
    Filed: May 15, 2018
    Publication date: November 22, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Noboru Ishiwata, Tomoyuki Kanayama, Yuzo KORI, Tomoharu Muro
  • Patent number: 10009245
    Abstract: A communication system includes: a first communication device configured to include first buffers to store data to be transmitted and received; a second communication device configured to include second buffers to store data to be transmitted and received; and a failure control device configured to include: an obtainment unit configured to obtain buffer usage state information to indicate a state of use of each of the first buffers and the second buffers from each of the first communication device and the second communication device; and an identification unit configured to identify a failure occurrence site on a channel, based on the obtained buffer usage state information, wherein the first communication device is configured to transmit and receive the data via the channel to and from the second communication device.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: June 26, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Yoshiharu Watanabe, Tomoyuki Kanayama
  • Patent number: 9990284
    Abstract: A storage control device includes a first processor, a second processor, and transfer units for transferring data from the first processor to the second processor. The first processor receives a write request for writing first data from a first device and sequentially transmits the first data, additional data, and pieces of dummy data. A number of the pieces is same as a number of the transfer units. The first processor notifies the first device of completion of the writing upon receiving an acknowledgement for a last transmitted piece of dummy data. Each transfer unit includes a third processor. The third processor receives the additional data from a preceding processor, and transmits an acknowledgement to the preceding processor upon storing the received additional data. The third processor receives one piece of dummy data from the preceding processor, and transmits an acknowledgement to the preceding processor upon storing the one piece.
    Type: Grant
    Filed: July 5, 2016
    Date of Patent: June 5, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Yoshiharu Watanabe, Takanori Ishii, Tomoyuki Kanayama
  • Publication number: 20180091358
    Abstract: An information processing apparatus includes a communication apparatus and a different communication apparatus connected to the communication apparatus via a plurality of transmission paths. The communication apparatus includes a transmitting unit and a control unit. In response to designation of a transmission path targeted for diagnosis, selected amongst the transmission paths while the communication apparatus is in a state capable of data communication with the different communication apparatus using the transmission paths, the transmitting unit transmits a test signal to the targeted transmission path while the state capable of data communication with the different communication apparatus is maintained using remaining transmission paths of the transmission paths other than the targeted transmission path.
    Type: Application
    Filed: August 16, 2017
    Publication date: March 29, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Kazuko Sasaki, Tomoyuki Kanayama, Takanori Ishii, Yohei Nuno
  • Publication number: 20170139605
    Abstract: A control device includes a first memory, a first processor coupled to the first memory, a second memory, and a second processor coupled to the second memory. The first processor is configured to store log information of an information processing device into the first memory. The second processor is configured to determine whether the log information is stored in the first memory. The second processor is configured to read the log information from the first memory when the second processor determines that the log information is stored in the first memory. The second processor is configured to write the read log information into the second memory.
    Type: Application
    Filed: November 9, 2016
    Publication date: May 18, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Tatsuya SHINOZAKI, TAKANORI ISHll, Tomoyuki Kanayama
  • Publication number: 20170046258
    Abstract: A storage control device includes a first processor, a second processor, and transfer units for transferring data from the first processor to the second processor. The first processor receives a write request for writing first data from a first device and sequentially transmits the first data, additional data, and pieces of dummy data. A number of the pieces is same as a number of the transfer units. The first processor notifies the first device of completion of the writing upon receiving an acknowledgement for a last transmitted piece of dummy data. Each transfer unit includes a third processor. The third processor receives the additional data from a preceding processor, and transmits an acknowledgement to the preceding processor upon storing the received additional data. The third processor receives one piece of dummy data from the preceding processor, and transmits an acknowledgement to the preceding processor upon storing the one piece.
    Type: Application
    Filed: July 5, 2016
    Publication date: February 16, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Yoshiharu WATANABE, Takanori ISHII, Tomoyuki Kanayama
  • Publication number: 20160080111
    Abstract: A receiver includes a processor. The processor is configured to receive first data blocks and a first parity block from a transmitter. The first data blocks are obtained by dividing first transmission data at a predetermined size. The first parity block is generated on basis of the first data blocks. The processor is configured to restore a first missing block on basis of first received blocks and the first parity block. The first missing block is an unsuccessfully received block of the first data blocks. The first received blocks are successfully received blocks of the first data blocks. The first parity block is successfully received.
    Type: Application
    Filed: August 14, 2015
    Publication date: March 17, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Shigeyuki MAEDA, Takanori ISHll, Tomoyuki KANAYAMA
  • Publication number: 20160057038
    Abstract: A communication system includes: a first communication device configured to include first buffers to store data to be transmitted and received; a second communication device configured to include second buffers to store data to be transmitted and received; and a failure control device configured to include: an obtainment unit configured to obtain buffer usage state information to indicate a state of use of each of the first buffers and the second buffers from each of the first communication device and the second communication device; and an identification unit configured to identify a failure occurrence site on a channel, based on the obtained buffer usage state information, wherein the first communication device is configured to transmit and receive the data via the channel to and from the second communication device.
    Type: Application
    Filed: July 27, 2015
    Publication date: February 25, 2016
    Applicant: Fujitsu Limited
    Inventors: YOSHIHARU WATANABE, Tomoyuki Kanayama
  • Publication number: 20140298076
    Abstract: A processing apparatus that constitutes an information processing system includes: a device that constitutes the processing apparatus; and a processing unit that detects an abnormality in the device, that counts the number of the abnormalities detected in the device, and that logically separates the device from the information processing system when the counted number of the abnormalities detected in the device is equal to or greater than a threshold.
    Type: Application
    Filed: March 18, 2014
    Publication date: October 2, 2014
    Applicant: FUJITSU LIMITED
    Inventor: Tomoyuki KANAYAMA
  • Patent number: 8521953
    Abstract: In a storage device expandable through serially coupling two or more additional enclosures, each including a first additional controller and a second additional controller, to a controller enclosure, including a first controller and a second controller, a first route is formed by serially coupling the first controller of the controller enclosure to the first additional controllers of the additional enclosures in the order of adding the additional enclosures and a second route is formed by serially coupling the second controller of the controller enclosure to the second additional controllers of the additional enclosures in an order different from that of adding the additional enclosures.
    Type: Grant
    Filed: January 3, 2011
    Date of Patent: August 27, 2013
    Assignee: Fujitsu Limited
    Inventors: Tomoyuki Kanayama, Shigeyuki Maeda, Nina Tsukamoto
  • Publication number: 20110179234
    Abstract: In a storage device expandable through serially coupling two or more additional enclosures, each including a first additional controller and a second additional controller, to a controller enclosure, including a first controller and a second controller, a first route is formed by serially coupling the first controller of the controller enclosure to the first additional controllers of the additional enclosures in the order of adding the additional enclosures and a second route is formed by serially coupling the second controller of the controller enclosure to the second additional controllers of the additional enclosures in an order different from that of adding the additional enclosures.
    Type: Application
    Filed: January 3, 2011
    Publication date: July 21, 2011
    Applicant: Fujitsu Limited
    Inventors: Tomoyuki KANAYAMA, Shigeyuki Maeda, Nina Tsukamoto
  • Patent number: 7523347
    Abstract: A RAID control apparatus is able to cooperate with another RAID control apparatus to control at least one RAID apparatus. The RAID control apparatus comprises a diagnosis unit and a control unit. The diagnosis unit diagnoses the other RAID control apparatus when an disk error is detected. The control unit stops controlling the RAID apparatus in cooperation with the other RAID control apparatus, whereby only the RAID control apparatus controls the RAID apparatus, when the diagnosis unit determines that the other RAID control apparatus has a trouble. The control unit causes only the other RAID control apparatus to control the RAID apparatus when a disk error is detected while only the RAID control apparatus is controlling the RAID apparatus.
    Type: Grant
    Filed: March 16, 2006
    Date of Patent: April 21, 2009
    Assignee: Fujitsu Limited
    Inventor: Tomoyuki Kanayama
  • Publication number: 20070174674
    Abstract: A RAID control apparatus is able to cooperate with another RAID control apparatus to control at least one RAID apparatus. The RAID control apparatus comprises a diagnosis unit and a control unit. The diagnosis unit diagnoses the other RAID control apparatus when an disk error is detected. The control unit stops controlling the RAID apparatus in cooperation with the other RAID control apparatus, whereby only the RAID control apparatus controls the RAID apparatus, when the diagnosis unit determines that the other RAID control apparatus has a trouble. The control unit causes only the other RAID control apparatus to control the RAID apparatus when a disk error is detected while only the RAID control apparatus is controlling the RAID apparatus.
    Type: Application
    Filed: March 16, 2006
    Publication date: July 26, 2007
    Applicant: Fujitsu Limited
    Inventor: Tomoyuki Kanayama