Patents by Inventor Tomoyuki Katada

Tomoyuki Katada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6452527
    Abstract: In a plurality of current cells 101 to 116 of a current adding type D/A converter, a switching sequence is determined in such a manner that current cells having large fluctuations of output currents (namely, current cells 101 and 116 located on both sides) are turned ON in the order corresponding to such a value nearly equal to either a maximum value or a minimum value of input data, whereas current cells having small fluctuations (current cells 108 and 109 located in the vicinity of center point) are turned ON in the order of such a value near a center point. At this time, the switching sequence is determined under such a condition that differences contained in fluctuations of output current amounts as to pairs of such current cells whose ON-sequences are adjacent to each other are made constant. Namely, in the respective paired current cells, a summation of array numbers is equal to 17 defined by a total current cell number+1 (16+1), namely becomes constant.
    Type: Grant
    Filed: June 27, 2001
    Date of Patent: September 17, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akifumi Takeya, Tomoyuki Katada
  • Patent number: 6433721
    Abstract: In a current source cell arrangement which comprises a plurality of current source cells (1) each having a predetermined current value, the current source cells being arranged in matrix; two or more of the current source cells in the current source cell matrix are combined to form constant current sources MCELL1-MCELL15 each having a predetermined current value; the current source cell matrix is divided into an A-block (2) and a B-block (3) arranged symmetrically with respect to a center of the matrix; and the constant current sources are formed by combining equal numbers of the current source cells selected in a row or column direction from each block.
    Type: Grant
    Filed: June 21, 2001
    Date of Patent: August 13, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Tomoyuki Katada
  • Patent number: 6388510
    Abstract: A gm-C filter system having low power consumption is provided. An adjusting circuit 2 is equipped with an oscillator 3 constructed of a gm amplifier 3a having the same arrangement as that of a gm amplifier 1a of a gm-C filter circuit 1. The adjusting circuit 2 generates a digital adjusting value “Dgm” based upon an oscillation signal OSC outputted from this oscillation 3, and this digital adjusting value “Dgm” is used to adjust a gm value of the gm amplifier 3a of the oscillator 3. This digital adjusting value “Dgm” is held in a register 10. The digital adjusting value “Dgm” held in this register 10 is converted into an analog adjusting value (bias current) by a D/A converter 8, and then, this analog adjusting value is supplied to the gm amplifier 1a of the gm-C filter circuit 1 so as to adjust the gm value. The adjusting circuit 2 is operated in an intermittent manner based upon, for example, a change contained in ambient temperatures of the gm-C filter system.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: May 14, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroki Hayashi, Shiro Doushoh, Takashi Morie, Kunihiro Fujiyama, Tomoyuki Katada
  • Publication number: 20020008652
    Abstract: In a plurality of current cells 101 to 116 of a current adding type D/A converter, a switching sequence is determined in such a manner that current cells having large fluctuations of output currents (namely, current cells 101 and 116 located on both sides) are turned ON in the order corresponding to such a value nearly equal to either a maximum value or a minimum value of input data, whereas current cells having small fluctuations (current cells 108 and 109 located in the vicinity of center point) are turned ON in the order of such a value near a center point. At this time, the switching sequence is determined under such a condition that differences contained in fluctuations of output current amounts as to pairs of such current cells whose ON-sequences are adjacent to each other are made constant. Namely, in the respective paired current cells, a summation of array numbers is equal to 17 defined by a total current cell number+1 (16+1), namely becomes constant.
    Type: Application
    Filed: June 27, 2001
    Publication date: January 24, 2002
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akifumi Takeya, Tomoyuki Katada
  • Publication number: 20020008572
    Abstract: A gm-C filter system having low power consumption is provided. An adjusting circuit 2 is equipped with an oscillator 3 constructed of a gm amplifier 3a having the same arrangement as that of a gm amplifier 1a of a gm-C filter circuit 1. The adjusting circuit 2 generates a digital adjusting value “Dgm” based upon an oscillation signal OSC outputted from this oscillation 3, and this digital adjusting value “Dgm” is used to adjust a gm value of the gm amplifier 3a of the oscillator 3. This digital adjusting value “Dgm” is held in a register 10. The digital adjusting value “Dgm” held in this register 10 is converted into an analog adjusting value (bias current) by a D/A converter 8, and then, this analog adjusting value is supplied to the gm amplifier 1a of the gm-C filter circuit 1 so as to adjust the gm value. The adjusting circuit 2 is operated in an intermittent manner based upon, for example, a change contained in ambient temperatures of the gm-C filter system.
    Type: Application
    Filed: July 12, 2001
    Publication date: January 24, 2002
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroki Hayashi, Shiro Dosho, Takashi Morie, Hirokuni Fujiyama, Tomoyuki Katada
  • Publication number: 20010054975
    Abstract: In a current source cell arrangement which comprises a plurality of current source cells (1) each having a predetermined current value, the current source cells being arranged in matrix; two or more of the current source cells in the current source cell matrix are combined to form constant current sources MCELL1-MCELL15 each having a predetermined current value; the current source cell matrix is divided into an A-block (2) and a B-block (3) arranged symmetrically with respect to a center of the matrix; and the constant current sources are formed by combining equal numbers of the current source cells selected in a row or column direction from each block.
    Type: Application
    Filed: June 21, 2001
    Publication date: December 27, 2001
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventor: Tomoyuki Katada