Patents by Inventor Tomoyuki Kikuchi

Tomoyuki Kikuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150091118
    Abstract: A method of making a microelectronic package includes forming a dielectric encapsulation layer on an in-process unit having a substrate having a first surface and a second surface remote therefrom. A microelectronic element is mounted to the first surface of the substrate, and a plurality of conductive elements exposed at the first surface, at least some of which are electrically connected to the microelectronic element. Wire bonds have bases joined to the conductive elements and end surfaces remote from the bases and define an edge surface extending away between the base and the end surface. The encapsulation layer is formed to at least partially cover the first surface and portions of the wire bonds with unencapsulated portions of the wire bonds being defined by at least one of the end surface or a portion of the edge surface that is uncovered thereby.
    Type: Application
    Filed: December 9, 2014
    Publication date: April 2, 2015
    Applicant: TESSERA, INC.
    Inventors: Hiroaki Sato, Teck-Gyu Kang, Belgacem Haba, Philip R. Osborn, Wei-Shun Wang, Ellis Chau, Ilyas Mohammed, Norihito Masuda, Kazuo Sakuma, Kiyoaki Hashimoto, Kurosawa Inetaro, Tomoyuki Kikuchi
  • Patent number: 8969133
    Abstract: A method of making a microelectronic package includes forming a dielectric encapsulation layer on an in-process unit having a substrate having a first surface and a second surface remote therefrom. A microelectronic element is mounted to the first surface of the substrate, and a plurality of conductive elements exposed at the first surface, at least some of which are electrically connected to the microelectronic element. Wire bonds have bases joined to the conductive elements and end surfaces remote from the bases and define an edge surface extending away between the base and the end surface. The encapsulation layer is formed to at least partially cover the first surface and portions of the wire bonds with unencapsulated portions of the wire bonds being defined by at least one of the end surface or a portion of the edge surface that is uncovered thereby.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: March 3, 2015
    Assignee: Tessera, Inc.
    Inventors: Hiroaki Sato, Teck-Gyu Kang, Belgacem Haba, Philip R. Osborn, Wei-Shun Wang, Ellis Chau, Ilyas Mohammed, Norihito Masuda, Kazuo Sakuma, Kiyoaki Hashimoto, Kurosawa Inetaro, Tomoyuki Kikuchi
  • Publication number: 20140154518
    Abstract: A barrier film including a plurality of cured layers each cured layer including a curing product of a polysilazane photocurable precursor, an uncured layer disposed between a first and a second cured layer of the plurality of cured layers, the uncured layer including the polysilazane photocurable precursor, and a gradient composition layer disposed between the first and the second cured layer and the uncured layer, wherein a concentration of the polysilazane photocurable precursor in the gradient composition layer increases with a distance from the first and the second cured layers toward the uncured layer.
    Type: Application
    Filed: December 2, 2013
    Publication date: June 5, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tomoyuki KIKUCHI, Kenichi NAGAYAMA
  • Patent number: 8618659
    Abstract: A microelectronic assembly includes a substrate having a first surface and a second surface remote from the first surface. A microelectronic element overlies the first surface and first electrically conductive elements are exposed at one of the first surface and the second surface. Some of the first conductive elements are electrically connected to the microelectronic element. Wire bonds have bases joined to the conductive elements and end surfaces remote from the substrate and the bases, each wire bond defining an edge surface extending between the base and the end surface. An encapsulation layer extends from the first surface and fills spaces between the wire bonds such that the wire bonds are separated by the encapsulation layer. Unencapsulated portions of the wire bonds are defined by at least portions of the end surfaces of the wire bonds that are uncovered by the encapsulation layer.
    Type: Grant
    Filed: May 2, 2012
    Date of Patent: December 31, 2013
    Assignee: Tessera, Inc.
    Inventors: Hiroaki Sato, Teck-Gyu Kang, Belgacem Haba, Philip R. Osborn, Wei-Shun Wang, Ellis Chau, Ilyas Mohammed, Norihito Masuda, Kazuo Sakuma, Kiyoaki Hashimoto, Kurosawa Inetaro, Tomoyuki Kikuchi
  • Patent number: 8598045
    Abstract: A method for manufacturing a semiconductor device including, forming a first insulating film above a silicon substrate, forming an impurity layer in the first insulating film by ion-implanting impurities into a predetermined depth of the first insulating film, and modifying the impurity layer to a barrier insulating film by annealing the first insulating film after the impurity layer is formed, is provided.
    Type: Grant
    Filed: June 21, 2010
    Date of Patent: December 3, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Hideaki Kikuchi, Kouichi Nagai, Tomoyuki Kikuchi
  • Publication number: 20120301633
    Abstract: A method of producing a gas barrier laminate comprises: the steps of forming an inorganic compound layer on a substrate by vapor-phase film deposition, applying surface roughening treatment to a surface of the inorganic compound layer, and subsequently forming an organic compound layer on the roughened surface of the inorganic compound layer by flash evaporation.
    Type: Application
    Filed: August 10, 2012
    Publication date: November 29, 2012
    Applicant: FUJIFILM CORPORATION
    Inventor: Tomoyuki KIKUCHI
  • Publication number: 20120280386
    Abstract: A microelectronic assembly includes a substrate having a first surface and a second surface remote from the first surface. A microelectronic element overlies the first surface and first electrically conductive elements are exposed at one of the first surface and the second surface. Some of the first conductive elements are electrically connected to the microelectronic element. Wire bonds have bases joined to the conductive elements and end surfaces remote from the substrate and the bases, each wire bond defining an edge surface extending between the base and the end surface. An encapsulation layer extends from the first surface and fills spaces between the wire bonds such that the wire bonds are separated by the encapsulation layer. Unencapsulated portions of the wire bonds are defined by at least portions of the end surfaces of the wire bonds that are uncovered by the encapsulation layer.
    Type: Application
    Filed: May 2, 2012
    Publication date: November 8, 2012
    Applicant: TESSERA, INC.
    Inventors: Hiroaki Sato, Teck-Gyu Kang, Belgacem Haba, Philip R. Osborn, Wei-Shun Wang, Ellis Chau, Ilyas Mohammed, Norihito Masuda, Kazuo Sakuma, Kiyoaki Hashimoto, Kurosawa Inetaro, Tomoyuki Kikuchi
  • Patent number: 8158307
    Abstract: The present invention provides a method of manufacturing a color filter, including: forming a first color pattern in a repeating pattern on a support; forming, on the support, a second color pattern in a repeating pattern in regions where the first color pattern is not formed; removing at least one portion of one of the first color pattern and the second color pattern by dry-etching, the portion being in a region where a third color pattern is to be formed; and forming, on the support, the third color pattern in the region where the portion of one of the first color pattern and the second color pattern has been removed. The present invention also provides a color filter manufactured by the method, and a solid-state image pickup element using the color filter.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: April 17, 2012
    Assignee: Fujifilm Corporation
    Inventors: Mitsuji Yoshibayashi, Teruaki Kinumura, Tomoyuki Kikuchi
  • Publication number: 20110294247
    Abstract: A semiconductor element comprises: a semiconductor substrate; and an amorphous metal oxide film as a first film deposited on the semiconductor substrate. By providing the amorphous metal oxide film as the first film, a recess with a large aspect ratio can be filled. As a result, a void/crack-free film of excellent quality can be formed.
    Type: Application
    Filed: June 2, 2011
    Publication date: December 1, 2011
    Inventor: Tomoyuki KIKUCHI
  • Publication number: 20100304106
    Abstract: A gas barrier laminate film including an organic compound layer and an oxide inorganic compound layer and having both excellent gas barrier properties and durability. The gas barrier laminate film comprises an organic compound layer, a silicon atom-containing compound layer on the organic compound layer, and an inorganic compound oxide layer on the silicon atom-containing compound layer.
    Type: Application
    Filed: May 27, 2010
    Publication date: December 2, 2010
    Applicant: FUJIFILM CORPORATION
    Inventors: NOBUHIKO TAKANO, TOMOYUKI KIKUCHI
  • Publication number: 20100261017
    Abstract: A method of producing a gas barrier laminate comprises: the steps of forming an inorganic compound layer on a substrate by vapor-phase film deposition, applying surface roughening treatment to a surface of the inorganic compound layer, and subsequently forming an organic compound layer on the roughened surface of the inorganic compound layer by flash evaporation.
    Type: Application
    Filed: April 13, 2010
    Publication date: October 14, 2010
    Applicant: FUJIFILM CORPORATION
    Inventor: Tomoyuki KIKUCHI
  • Publication number: 20100261008
    Abstract: A gas barrier film includes two or more laminates formed on a substrate. each laminate has a organic layer and a inorganic layer stacked in this order. The organic layer directly formed on the substrate includes a (meth)acrylic compound having a glass transition temperature of at least 200° C. and a C—C bond density in the monomer of at least 0.19, and has a thickness of at least 300 nm but less than 1000 nm, and the other organic layer includes a (meth)acrylic compound having a glass transition temperature of at least 105° C. and a C—C bond density in the monomer of at least 0.19, and has a thickness of at least 50 nm but less than 300 nm. The inorganic layers are formed by plasma-enhanced film deposition. A producing method produces the gas barrier film using the plasma-enhanced film deposition.
    Type: Application
    Filed: April 12, 2010
    Publication date: October 14, 2010
    Applicant: FUJIFILM CORPORATION
    Inventor: Tomoyuki KIKUCHI
  • Publication number: 20100255675
    Abstract: A method for manufacturing a semiconductor device including, forming a first insulating film above a silicon substrate, forming an impurity layer in the first insulating film by ion-implanting impurities into a predetermined depth of the first insulating film, and modifying the impurity layer to a barrier insulating film by annealing the first insulating film after the impurity layer is formed, is provided.
    Type: Application
    Filed: June 21, 2010
    Publication date: October 7, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Hideaki Kikuchi, Kouichi Nagai, Tomoyuki Kikuchi
  • Publication number: 20080237764
    Abstract: A semiconductor element comprises: a semiconductor substrate; and an amorphous metal oxide film as a first film deposited on the semiconductor substrate. By providing the amorphous metal oxide film as the first film, a recess with a large aspect ratio can be filled. As a result, a void/crack-free film of excellent quality can be formed.
    Type: Application
    Filed: March 28, 2008
    Publication date: October 2, 2008
    Applicant: FUJIFILM Corporation
    Inventor: Tomoyuki Kikuchi
  • Publication number: 20080206659
    Abstract: The present invention provides a method of manufacturing a color filter, including: forming a first color pattern in a repeating pattern on a support; forming, on the support, a second color pattern in a repeating pattern in regions where the first color pattern is not formed; removing at least one portion of one of the first color pattern and the second color pattern by dry-etching, the portion being in a region where a third color pattern is to be formed; and forming, on the support, the third color pattern in the region where the portion of one of the first color pattern and the second color pattern has been removed. The present invention also provides a color filter manufactured by the method, and a solid-state image pickup element using the color filter.
    Type: Application
    Filed: February 14, 2008
    Publication date: August 28, 2008
    Applicant: FUJIFILM CORPORATION
    Inventors: Mitsuji YOSHIBAYASHI, Teruaki KINUMURA, Tomoyuki KIKUCHI
  • Publication number: 20080203576
    Abstract: A method for manufacturing a semiconductor device including, forming a first insulating film above a silicon substrate, forming an impurity layer in the first insulating film by ion-implanting impurities into a predetermined depth of the first insulating film, and modifying the impurity layer to a barrier insulating film by annealing the first insulating film after the impurity layer is formed, is provided.
    Type: Application
    Filed: February 7, 2008
    Publication date: August 28, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Hideaki KIKUCHI, Kouichi NAGAI, Tomoyuki KIKUCHI