Patents by Inventor Tomoyuki Oishi

Tomoyuki Oishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240119745
    Abstract: By an object recognition device, an object recognition method, or a non-transitory computer-readable storage medium storing an object recognition program, matching between a three-dimensional dynamic map representing a state of a mapping point group obtained by mapping of a target existing in an observation space and three-dimensional observation data representing a state of an observation point group observed in the observation space is performed, a candidate point of the mobile object is searched, and the mobile object is identified.
    Type: Application
    Filed: December 6, 2023
    Publication date: April 11, 2024
    Inventors: SUGURU YAMAZAKI, TOMOYUKI OISHI, MOTOKI TANAKA
  • Patent number: 11823903
    Abstract: According to an embodiment, a wafer (W) includes a layer (EL) to be etched, an organic film (OL), an antireflection film (AL), and a mask (MK1), and a method (MT) according to an embodiment includes a step of performing an etching process on the antireflection film (AL) by using the mask (MK1) with plasma generated in a processing container (12), in the processing container (12) of a plasma processing apparatus (10) in which the wafer (W) is accommodated, and the step includes steps ST3a to ST4 of conformally forming a protective film (SX) on the surface of the mask (MK1), and steps ST6a to ST7 of etching the antireflection film (AL) by removing the antireflection film (AL) for each atomic layer by using the mask (MK1) on which the protective film (SX) is formed.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: November 21, 2023
    Assignee: Tokyo Electron Limited
    Inventors: Yoshihide Kihara, Toru Hisamatsu, Tomoyuki Oishi
  • Publication number: 20230317462
    Abstract: A method of processing a substrate that includes: performing a cyclic plasma etch process including a plurality of cycles, each of the plurality of cycles including: etching a patterning layer including a polycrystalline semiconductor material to form or extend a recess by exposing the substrate to a first plasma, the substrate including an oxide layer, the patterning layer formed over the oxide layer, exposing the substrate to a second plasma, the second plasma including dihydrogen, and extending the recess by exposing the substrate to a third plasma, the second plasma being different from the first plasma and the third plasma.
    Type: Application
    Filed: March 9, 2022
    Publication date: October 5, 2023
    Inventors: Yun Han, Alok Ranjan, Tomoyuki Oishi, Shuhei Ogawa, Ken Kobayashi, Peter Biolsi
  • Publication number: 20220122840
    Abstract: According to an embodiment, a wafer (W) includes a layer (EL) to be etched, an organic film (OL), an antireflection film (AL), and a mask (MK1), and a method (MT) according to an embodiment includes a step of performing an etching process on the antireflection film (AL) by using the mask (MK1) with plasma generated in a processing container (12), in the processing container (12) of a plasma processing apparatus (10) in which the wafer (W) is accommodated, and the step includes steps ST3a to ST4 of conformally forming a protective film (SX) on the surface of the mask (MK1), and steps ST6a to ST7 of etching the antireflection film (AL) by removing the antireflection film (AL) for each atomic layer by using the mask (MK1) on which the protective film (SX) is formed.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 21, 2022
    Applicant: Tokyo Electron Limited
    Inventors: Yoshihide KIHARA, Toru HISAMATSU, Tomoyuki OISHI
  • Patent number: 11244828
    Abstract: According to an embodiment, a wafer (W) includes a layer (EL) to be etched, an organic film (OL), an antireflection film (AL), and a mask (MK1), and a method (MT) according to an embodiment includes a step of performing an etching process on the antireflection film (AL) by using the mask (MK1) with plasma generated in a processing container (12), in the processing container (12) of a plasma processing apparatus (10) in which the wafer (W) is accommodated, and the step includes steps ST3a to ST4 of conformally forming a protective film (SX) on the surface of the mask (MK1), and steps ST6a to ST7 of etching the antireflection film (AL) by removing the antireflection film (AL) for each atomic layer by using the mask (MK1) on which the protective film (SX) is formed.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: February 8, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Yoshihide Kihara, Toru Hisamatsu, Tomoyuki Oishi
  • Publication number: 20200303181
    Abstract: According to an embodiment, a wafer (W) includes a layer (EL) to be etched, an organic film (OL), an antireflection film (AL), and a mask (MK1), and a method (MT) according to an embodiment includes a step of performing an etching process on the antireflection film (AL) by using the mask (MK1) with plasma generated in a processing container (12), in the processing container (12) of a plasma processing apparatus (10) in which the wafer (W) is accommodated, and the step includes steps ST3a to ST4 of conformally forming a protective film (SX) on the surface of the mask (MK1), and steps ST6a to ST7 of etching the antireflection film (AL) by removing the antireflection film (AL) for each atomic layer by using the mask (MK1) on which the protective film (SX) is formed.
    Type: Application
    Filed: June 11, 2020
    Publication date: September 24, 2020
    Applicant: Tokyo Electron Limited
    Inventors: Yoshihide KIHARA, Toru HISAMATSU, Tomoyuki OISHI
  • Patent number: 10714340
    Abstract: According to an embodiment, a wafer W includes a layer EL to be etched, an organic film OL, an antireflection film AL, and a mask MK1, and a method MT according to an embodiment includes a step of performing an etching process on the antireflection film AL by using the mask MK1 with plasma generated in a processing container 12, in the processing container 12 of a plasma processing apparatus 10 in which the wafer W is accommodated, and the step includes steps ST3a to ST4 of conformally forming a protective film SX on the surface of the mask MK1, and steps ST6a to ST7 of etching the antireflection film AL by removing the antireflection film AL for each atomic layer by using the mask MK1 on which the protective film SX is formed.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: July 14, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Yoshihide Kihara, Toru Hisamatsu, Tomoyuki Oishi
  • Publication number: 20190108997
    Abstract: According to an embodiment, a wafer W includes a layer EL to be etched, an organic film OL, an antireflection film AL, and a mask MK1, and a method MT according to an embodiment includes a step of performing an etching process on the antireflection film AL by using the mask MK1 with plasma generated in a processing container 12, in the processing container 12 of a plasma processing apparatus 10 in which the wafer W is accommodated, and the step includes steps ST3a to ST4 of conformally forming a protective film SX on the surface of the mask MK1, and steps ST6a to ST7 of etching the antireflection film AL by removing the antireflection film AL for each atomic layer by using the mask MK1 on which the protective film SX is formed.
    Type: Application
    Filed: March 27, 2017
    Publication date: April 11, 2019
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Yoshihide KIHARA, Toru HISAMATSU, Tomoyuki OISHI
  • Patent number: 9911622
    Abstract: Non-uniformity in a thickness of a silicon oxide film formed on a processing target object can be reduced even when an aspect ratio of an opening of a mask is increased. A silicon oxide film is formed by repeating a sequence including: (a) a first process of forming a reactant precursor on the processing target object by generating plasma of a first gas containing a silicon halide gas within a processing vessel of a plasma processing apparatus; (b) a second process of generating plasma of a rare gas within the processing vessel after the first process; (c) a third process of forming a silicon oxide film by generating plasma of a second gas containing an oxygen gas within the processing vessel after the second process; and (d) a fourth process of generating plasma of a rare gas within the processing vessel after the third process.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: March 6, 2018
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Yoshihide Kihara, Toru Hisamatsu, Tomoyuki Oishi, Masanobu Honda
  • Patent number: 9859126
    Abstract: A method for processing a target object by using a capacitively coupled plasma processing apparatus includes a first step of supplying a first gas containing a silicon-containing gas into the processing chamber where a target object is accommodated; a second step of generating a plasma of a rare gas in the processing chamber after executing the first step; a third step of generating a plasma of a second gas containing oxygen gas in the processing chamber after executing the second step; and a fourth step of generating a plasma of a rare gas in the processing chamber after executing the third step. A silicon oxide film is formed by repeatedly executing a sequence including the first step to the fourth step. A negative DC voltage is applied to the upper electrode in at least any one of the second step to the fourth step.
    Type: Grant
    Filed: April 25, 2016
    Date of Patent: January 2, 2018
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Yoshihide Kihara, Tomoyuki Oishi, Toru Hisamatsu
  • Patent number: 9721766
    Abstract: A method for processing a target object includes a formation step of forming a silicon oxide film in a processing chamber by repeatedly executing a sequence including a first step of supplying a first gas containing aminosilane-based gas, a second step of purging a space in the processing chamber after the first step, a third step of generating a plasma of a second gas containing oxygen gas after the second step, and a fourth step of purging the space after the third step. The method further includes a preparation step executed before the target object is accommodated in the processing chamber and a processing step of performing an etching process on the target object. The preparation step is performed before the processing step. The formation step is performed in the preparation step and the processing step. In the first step, a plasma of the first gas is not generated.
    Type: Grant
    Filed: October 4, 2016
    Date of Patent: August 1, 2017
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Yoshihide Kihara, Toru Hisamatsu, Masanobu Honda, Tomoyuki Oishi
  • Publication number: 20170098528
    Abstract: A method for processing a target object includes a formation step of forming a silicon oxide film in a processing chamber by repeatedly executing a sequence including a first step of supplying a first gas containing aminosilane-based gas, a second step of purging a space in the processing chamber after the first step, a third step of generating a plasma of a second gas containing oxygen gas after the second step, and a fourth step of purging the space after the third step. The method further includes a preparation step executed before the target object is accommodated in the processing chamber and a processing step of performing an etching process on the target object. The preparation step is performed before the processing step. The formation step is performed in the preparation step and the processing step. In the first step, a plasma of the first gas is not generated.
    Type: Application
    Filed: October 4, 2016
    Publication date: April 6, 2017
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Yoshihide KIHARA, Toru HISAMATSU, Masanobu HONDA, Tomoyuki OISHI
  • Publication number: 20160314982
    Abstract: A method for processing a target object by using a capacitively coupled plasma processing apparatus includes a first step of supplying a first gas containing a silicon-containing gas into the processing chamber where a target object is accommodated; a second step of generating a plasma of a rare gas in the processing chamber after executing the first step; a third step of generating a plasma of a second gas containing oxygen gas in the processing chamber after executing the second step; and a fourth step of generating a plasma of a rare gas in the processing chamber after executing the third step. A silicon oxide film is formed by repeatedly executing a sequence including the first step to the fourth step. A negative DC voltage is applied to the upper electrode in at least any one of the second step to the fourth step.
    Type: Application
    Filed: April 25, 2016
    Publication date: October 27, 2016
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Yoshihide KIHARA, Tomoyuki OISHI, Toru HISAMATSU
  • Publication number: 20160225639
    Abstract: Non-uniformity in a thickness of a silicon oxide film formed on a processing target object can be reduced even when an aspect ratio of an opening of a mask is increased. A silicon oxide film is formed by repeating a sequence including: (a) a first process of forming a reactant precursor on the processing target object by generating plasma of a first gas containing a silicon halide gas within a processing vessel of a plasma processing apparatus; (b) a second process of generating plasma of a rare gas within the processing vessel after the first process; (c) a third process of forming a silicon oxide film by generating plasma of a second gas containing an oxygen gas within the processing vessel after the second process; and (d) a fourth process of generating plasma of a rare gas within the processing vessel after the third process.
    Type: Application
    Filed: January 27, 2016
    Publication date: August 4, 2016
    Inventors: Yoshihide Kihara, Toru Hisamatsu, Tomoyuki Oishi, Masanobu Honda