Abstract: A reset device includes a power-on reset (POR) circuit configured to output a reset signal to reset a circuit part to an initial state when supply voltage is lower than a threshold level, a first switch provided in a path connecting a first line to supply the supply voltage to the circuit part and a second line to supply the supply voltage to the POR circuit, a second switch provided in a path connecting a signal line of the circuit part and the second line, and a control circuit configured to turn on the first switch and turn off the second switch in a normal mode, and to turn off the first switch and turn on the second switch in a test mode. The control circuit turns on the first switch and turns off the second switch in response to the reset signal being output from the POR circuit.

Abstract: A reset device includes a power-on reset (POR) circuit configured to output a reset signal to reset a circuit part to an initial state when supply voltage is lower than a threshold level, a first switch provided in a path connecting a first line to supply the supply voltage to the circuit part and a second line to supply the supply voltage to the POR circuit, a second switch provided in a path connecting a signal line of the circuit part and the second line, and a control circuit configured to turn on the first switch and turn off the second switch in a normal mode, and to turn off the first switch and turn on the second switch in a test mode. The control circuit turns on the first switch and turns off the second switch in response to the reset signal being output from the POR circuit.

Abstract: A voltage of a first capacitor is compared with a threshold voltage and a signal corresponding to the comparison result is generated at each of a first timing during a period after the transfer of a positive charge has ended and before the transfer of a negative charge starts and a second timing during a period after the transfer of the negative charge has ended and before the transfer of the positive charge starts. In each of the case where a positive charge is transferred and the case where a negative charge is transferred, operations (digitization of an integrated value and a feedback operation) of a delta sigma modulator are performed.

Abstract: A sensor detects the rotation of a component (object) of a vehicle in a non-contact manner, and generates a differential signal according to the rotation. Two comparators have different hysteresis characteristics. At both edges of one signal that is an output of one of the comparators, if a signal of the other comparator is not at the same level, it is determined that a distance (gap) between an object and the sensor is within a predetermined range in which the differential signal is effective.

Abstract: A voltage of a first capacitor is compared with a threshold voltage and a signal corresponding to the comparison result is generated at each of a first timing during a period after the transfer of a positive charge has ended and before the transfer of a negative charge starts and a second timing during a period after the transfer of the negative charge has ended and before the transfer of the positive charge starts. In each of the case where a positive charge is transferred and the case where a negative charge is transferred, operations (digitization of an integrated value and a feedback operation) of a delta sigma modulator are performed.

Abstract: A semiconductor integrated circuit device is configured such that if, due to an erroneous connection or the like, an abnormal state is entered in which an output voltage is lower than a ground potential VSS, an N-type DMOS transistor and a first P-type MOS transistor are turned off and a voltage is applied to their parasitic diodes in the opposite direction, preventing a current from flowing. In a normal state in which the output voltage is higher than the ground potential, at least one of the N-type DMOS transistor and first P-type MOS transistor, which are connected in parallel, is turned on, preventing a current from flowing into the parasitic diode of the N-type DMOS transistor.

Abstract: A semiconductor integrated circuit device is configured such that if, due to an erroneous connection or the like, an abnormal state is entered in which an output voltage is lower than a ground potential VSS, an N-type DMOS transistor and a first P-type MOS transistor are turned off and a voltage is applied to their parasitic diodes in the opposite direction, preventing a current from flowing. In a normal state in which the output voltage is higher than the ground potential, at least one of the N-type DMOS transistor and first P-type MOS transistor, which are connected in parallel, is turned on, preventing a current from flowing into the parasitic diode of the N-type DMOS transistor.

Abstract: The highest voltage of a power supply voltage, a ground potential, and a signal voltage is output as a selection voltage from a terminal on the output side. In this case, terminals on the input side and the terminal on the output side are connected to each other through MOS transistors in the ON state. Therefore, it is possible to suppress a voltage drop due to a parasitic diode of each MOS transistor.

Abstract: The highest voltage of a power supply voltage, a ground potential, and a signal voltage is output as a selection voltage from a terminal on the output side. In this case, terminals on the input side and the terminal on the output side are connected to each other through MOS transistors in the ON state. Therefore, it is possible to suppress a voltage drop due to a parasitic diode of each MOS transistor.

Abstract: A sensor detects the rotation of a component (object) of a vehicle in a non-contact manner, and generates a differential signal according to the rotation. Two comparators have different hysteresis characteristics. At both edges of one signal that is an output of one of the comparators, if a signal of the other comparator is not at the same level, it is determined that a distance (gap) between an object and the sensor is within a predetermined range in which the differential signal is effective.

Abstract: A protection circuit includes a power supply terminal, a ground terminal, a control unit connected to the power supply terminal and the ground terminal, and a supply unit connected to the power supply terminal and the ground terminal, for preventing application of voltage in a reverse direction to a circuit unit having a predetermined function. In this case, the control unit generates a control potential, which controls the control unit and the supply unit in accordance with a potential supplied from the power supply terminal and a potential supplied from the ground terminal. The supply unit is configured to be capable of supplying current to a circuit unit connected to a subsequent stage on the basis of a potential supplied from the power supply terminal, a potential supplied from the ground terminal, and the control potential generated by the control unit.

Abstract: A protection circuit includes a power supply terminal, a ground terminal, a control unit connected to the power supply terminal and the ground terminal, and a supply unit connected to the power supply terminal and the ground terminal, for preventing application of voltage in a reverse direction to a circuit unit having a predetermined function. In this case, the control unit generates a control potential, which controls the control unit and the supply unit in accordance with a potential supplied from the power supply terminal and a potential supplied from the ground terminal. The supply unit is configured to be capable of supplying current to a circuit unit connected to a subsequent stage on the basis of a potential supplied from the power supply terminal, a potential supplied from the ground terminal, and the control potential generated by the control unit.

Abstract: A capacitance detector includes: a first capacitor with fixed base capacitance and variable capacitance; a second capacitor charged with base charge corresponding to the base capacitance; third and fourth capacitors which receive capacitance distribution from the first or second capacitor; a first switching means for charging the first and second capacitors to a first fixed voltage and charging the third and fourth capacitors to a second fixed voltage in a first section and for charging the first and second capacitors to the second fixed voltage and charging the third and fourth capacitors to the first fixed voltage in a second section; a second switching means for separating the first and second capacitors from the third and fourth capacitors and for connecting the first and second capacitors to the third and fourth capacitors; and a differential amplifier to which first and second voltages corresponding to equalized charge are differentially input.

Abstract: A capacitance detector includes: a first capacitor with fixed base capacitance and variable capacitance; a second capacitor charged with base charge corresponding to the base capacitance; third and fourth capacitors which receive capacitance distribution from the first or second capacitor; a first switching means for charging the first and second capacitors to a first fixed voltage and charging the third and fourth capacitors to a second fixed voltage in a first section and for charging the first and second capacitors to the second fixed voltage and charging the third and fourth capacitors to the first fixed voltage in a second section; a second switching means for separating the first and second capacitors from the third and fourth capacitors and for connecting the first and second capacitors to the third and fourth capacitors; and a differential amplifier to which first and second voltages corresponding to equalized charge are differentially input.