Patents by Inventor Tomoyuki Shimodaira

Tomoyuki Shimodaira has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230120515
    Abstract: An interconnect substrate includes a pad for external connection and an insulating layer, wherein a portion of a lower surface of the pad is covered with the insulating layer, wherein an upper surface of the pad is situated at a lower position than an upper surface of the insulating layer, and wherein a groove whose bottom surface is formed by the insulating layer is formed around the pad in a plan view, and has an opening on an upper surface side of the insulating layer.
    Type: Application
    Filed: October 14, 2022
    Publication date: April 20, 2023
    Inventors: Hikaru TANAKA, Takashi KASUGA, Tomoyuki SHIMODAIRA, Hitoshi KONDO
  • Publication number: 20230123522
    Abstract: A wiring board includes a pad configured to make an external electrical connection, and an insulating layer. A portion of a lower surface of the pad is covered with the insulating layer. The pad includes a base portion, and an extending portion formed integrally with the base portion and extending toward an outer periphery of a side surface of the base portion in a plan view at a lower end of the side surface of the base portion. The insulating layer is provided with a groove that is located in a periphery of the pad in the plan view, exposes a side surface of the pad, and opens to an upper surface of the insulating layer.
    Type: Application
    Filed: October 4, 2022
    Publication date: April 20, 2023
    Inventors: Hikaru TANAKA, Takashi KASUGA, Tomoyuki SHIMODAIRA, Hitoshi KONDO
  • Publication number: 20230089948
    Abstract: A wiring board includes: a wiring layer; an insulating layer laminated on the wiring layer; an opening portion penetrating through the insulating layer to the wiring layer; a recess portion formed in a surface of the wiring layer exposed from the opening portion of the insulating layer; and a conductor film formed in the opening portion of the insulating layer and the recess portion of the wiring layer, wherein the recess portion of the wiring layer includes a raised portion, which is raised higher than an outer peripheral portion of a bottom surface, at a central portion of the bottom surface.
    Type: Application
    Filed: September 19, 2022
    Publication date: March 23, 2023
    Inventors: Takashi Kasuga, Tomoyuki Shimodaira, Hikaru Tanaka, Naotaka Noguchi, Takashi Sato, Hitoshi Kondo
  • Patent number: 11574866
    Abstract: An insulating layer containing fillers is formed to cover a first wiring layer. An opening portion, in which the first wiring layer is exposed, is formed in the insulating layer. A first alkali treatment, an ultrasonic cleaning treatment, and a second alkali treatment are sequentially performed on an upper surface of the insulating layer, on an inner wall surface of the opening portion, and an upper surface of the first wiring layer exposed in the opening portion. A second wiring layer electrically connected to the first wiring layer is formed by filling the opening portion by plating. The second wiring layer extends from an inside of the opening portion to the upper surface of the insulating layer.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: February 7, 2023
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yoshihisa Kanbe, Tomoyuki Shimodaira, Takashi Sato
  • Publication number: 20220068808
    Abstract: An insulating layer containing fillers is formed to cover a first wiring layer. An opening portion, in which the first wiring layer is exposed, is formed in the insulating layer. A first alkali treatment, an ultrasonic cleaning treatment, and a second alkali treatment are sequentially performed on an upper surface of the insulating layer, on an inner wall surface of the opening portion, and an upper surface of the first wiring layer exposed in the opening portion. A second wiring layer electrically connected to the first wiring layer is formed by filling the opening portion by plating. The second wiring layer extends from an inside of the opening portion to the upper surface of the insulating layer.
    Type: Application
    Filed: November 11, 2021
    Publication date: March 3, 2022
    Inventors: Yoshihisa Kanbe, Tomoyuki Shimodaira, Takashi Sato
  • Patent number: 11211326
    Abstract: An insulating layer containing fillers is formed to cover a first wiring layer. An opening portion, in which the first wiring layer is exposed, is formed in the insulating layer. A first alkali treatment, an ultrasonic cleaning treatment, and a second alkali treatment are sequentially performed on an upper surface of the insulating layer, on an inner wall surface of the opening portion, and an upper surface of the first wiring layer exposed in the opening portion. A second wiring layer electrically connected to the first wiring layer is formed by filling the opening portion by plating. The second wiring layer extends from an inside of the opening portion to the upper surface of the insulating layer.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: December 28, 2021
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yoshihisa Kanbe, Tomoyuki Shimodaira, Takashi Sato
  • Patent number: 11001930
    Abstract: A method of manufacturing a wiring board, includes forming an interconnect layer on a first insulating layer, roughening a surface of the interconnect layer, not in contact with the first insulating layer, to form concavo-convex portions, forming a bond enhancing film on the concavo-convex portions, partially removing the bond enhancing film, using an acid solution, and forming a second insulating layer on the first insulating layer, to cover the interconnect layer.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: May 11, 2021
    Assignee: SHINKO ELECTRIC INDUSTRIES CO, LTD.
    Inventors: Tomoyuki Shimodaira, Hitoshi Kondo
  • Publication number: 20200413545
    Abstract: A method of manufacturing a wiring board, includes forming an interconnect layer on a first insulating layer, roughening a surface of the interconnect layer, not in contact with the first insulating layer, to form concavo-convex portions, forming a bond enhancing film on the concavo-convex portions, partially removing the bond enhancing film, using an acid solution, and forming a second insulating layer on the first insulating layer, to cover the interconnect layer.
    Type: Application
    Filed: June 18, 2020
    Publication date: December 31, 2020
    Inventors: Tomoyuki SHIMODAIRA, Hitoshi KONDO
  • Publication number: 20200411432
    Abstract: An insulating layer containing fillers is formed to cover a first wiring layer. An opening portion, in which the first wiring layer is exposed, is formed in the insulating layer. A first alkali treatment, an ultrasonic cleaning treatment, and a second alkali treatment are sequentially performed on an upper surface of the insulating layer, on an inner wall surface of the opening portion, and an upper surface of the first wiring layer exposed in the opening portion. A second wiring layer electrically connected to the first wiring layer is formed by filling the opening portion by plating. The second wiring layer extends from an inside of the opening portion to the upper surface of the insulating layer.
    Type: Application
    Filed: June 24, 2020
    Publication date: December 31, 2020
    Inventors: Yoshihisa Kanbe, Tomoyuki Shimodaira, Takashi Sato
  • Patent number: 10643934
    Abstract: A wiring substrate include a pad, an insulation layer having an opening arranged on the pad, a metal post including a seed layer and a metal plated layer, the seed layer arranged on the pad and an upper surface of the insulation layer, the metal plated layer arranged on the seed layer, and a connection metal layer formed on the metal plated layer. A side surface of the metal plated layer has a concave surface recessed inward from a lower end of the connection metal layer. A side surface of the seed layer is recessed inward from a lower end of the metal plated layer.
    Type: Grant
    Filed: January 9, 2019
    Date of Patent: May 5, 2020
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Tomoyuki Shimodaira
  • Publication number: 20190221508
    Abstract: A wiring substrate include a pad, an insulation layer having an opening arranged on the pad, a metal post including a seed layer and a metal plated layer, the seed layer arranged on the pad and an upper surface of the insulation layer, the metal plated layer arranged on the seed layer, and a connection metal layer formed on the metal plated layer. A side surface of the metal plated layer has a concave surface recessed inward from a lower end of the connection metal layer. A side surface of the seed layer is recessed inward from a lower end of the metal plated layer.
    Type: Application
    Filed: January 9, 2019
    Publication date: July 18, 2019
    Inventor: Tomoyuki Shimodaira
  • Patent number: 9918378
    Abstract: A wiring substrate includes a wiring layer, an insulating layer covering the wiring layer, and a protruding electrode including a protruding metal layer and a surface metal layer. The protruding metal layer is connected to the wiring layer in an opening of the insulating layer, extends from within the opening to be stepped at the edge of the opening to extend outward onto the insulating layer, and includes a first surface contacting a surface of the insulating layer around the opening, a second surface, and a peripheral surface extending between the first and second surfaces, and bent inward to form a space between the peripheral surface and the surface of the insulating layer. The surface metal layer covers the protruding metal layer without contacting the surface of the insulating layer, and is formed of a metal having a lower melting point than the protruding metal layer.
    Type: Grant
    Filed: October 16, 2017
    Date of Patent: March 13, 2018
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Tomoyuki Shimodaira
  • Patent number: 9893002
    Abstract: A terminal structure of a wiring substrate includes a wiring layer, a protective insulation layer including an opening that partially exposes an upper surface of the wiring layer, and a connection terminal formed on the wiring layer. The connection terminal includes a base portion formed in the opening and a connection portion formed on the base portion. The connection portion projects from an upper surface of the protective insulation layer. A gap is formed between a side surface of the base portion and a wall surface of the opening.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: February 13, 2018
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Tomoyuki Shimodaira
  • Patent number: 9711476
    Abstract: A wiring board includes: an insulating layer; a pad including: an upper surface; a lower surface opposite to the upper surface; and a side surface between the upper surface and the lower surface, wherein the side surface and the lower surface of the pad are embedded in the insulating layer; and a metal post formed on the upper surface of the pad and including: an upper surface; a lower surface opposite to the upper surface; and a side surface between the upper surface and the lower surface, wherein a narrowed portion is formed in the side surface of the metal post.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: July 18, 2017
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Tomoyuki Shimodaira, Takahiro Rokugawa, Hitoshi Kondo
  • Patent number: 9699912
    Abstract: A wiring board includes an insulating layer; and a wiring layer embedded in the insulating layer at one surface side of the insulating layer, one surface of the wiring layer being exposed from one surface of the insulating layer, the wiring layer including a first portion and a second portion whose width is wider than that of the first portion, one surface of the first portion and one surface of the second portion being flush with each other, and the first portion being thinner than the second portion.
    Type: Grant
    Filed: April 13, 2016
    Date of Patent: July 4, 2017
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Toyoaki Sakai, Tomoyuki Shimodaira, Shunichiro Matsumoto, Kentaro Kaneko
  • Publication number: 20170179012
    Abstract: A terminal structure of a wiring substrate includes a wiring layer, a protective insulation layer including an opening that partially exposes an upper surface of the wiring layer, and a connection terminal formed on the wiring layer. The connection terminal includes a base portion formed in the opening and a connection portion formed on the base portion. The connection portion projects from an upper surface of the protective insulation layer. A gap is formed between a side surface of the base portion and a wall surface of the opening.
    Type: Application
    Filed: December 8, 2016
    Publication date: June 22, 2017
    Inventor: TOMOYUKI SHIMODAIRA
  • Publication number: 20160365327
    Abstract: A wiring board includes: an insulating layer; a pad including: an upper surface; a lower surface opposite to the upper surface; and a side surface between the upper surface and the lower surface, wherein the side surface and the lower surface of the pad are embedded in the insulating layer; and a metal post formed on the upper surface of the pad and including: an upper surface; a lower surface opposite to the upper surface; and a side surface between the upper surface and the lower surface, wherein a narrowed portion is formed in the side surface of the metal post.
    Type: Application
    Filed: June 6, 2016
    Publication date: December 15, 2016
    Inventors: Tomoyuki Shimodaira, Takahiro Rokugawa, Hitoshi Kondo
  • Publication number: 20160316560
    Abstract: A wiring board includes an insulating layer; and a wiring layer embedded in the insulating layer at one surface side of the insulating layer, one surface of the wiring layer being exposed from one surface of the insulating layer, the wiring layer including a first portion and a second portion whose width is wider than that of the first portion, one surface of the first portion and one surface of the second portion being flush with each other, and the first portion being thinner than the second portion.
    Type: Application
    Filed: April 13, 2016
    Publication date: October 27, 2016
    Inventors: Toyoaki SAKAI, Tomoyuki SHIMODAIRA, Shunichiro MATSUMOTO, Kentaro KANEKO
  • Patent number: 9232641
    Abstract: A wiring board includes a core layer, a through-hole penetrating through the core layer in its thickness direction, a first wiring layer formed on a first surface of the core layer, a through-hole wiring formed in the through-hole and electrically connected to the first wiring layer, and a curved first chamfered portion formed in a boundary portion between an inner side surface of the through-hole and the first surface of the core layer. The first wiring layer includes a first metal layer formed outside the first chamfered portion on the first surface of the core layer and a second metal layer formed on the first chamfered portion and the first metal layer.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: January 5, 2016
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Takahiro Rokugawa, Tomoyuki Shimodaira
  • Patent number: 8669478
    Abstract: A wiring substrate includes a first insulating layer formed as an outermost layer on one surface side, and exhibiting a black color or a gray color, a first connection pad formed to expose from the first insulating layer, a second insulating layer formed as an outermost layer on another surface side, and exhibiting a black color or a gray color, and a second connection pad formed to expose from the second insulating layer, wherein a connection hole having a side wall surface formed like a curved surface is formed in the second insulating layer, and the second connection pad is exposed to a bottom part of the connection hole.
    Type: Grant
    Filed: June 13, 2011
    Date of Patent: March 11, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Hitoshi Kondo, Tomoyuki Shimodaira, Masako Sato