Patents by Inventor Tomoyuki Tanaka
Tomoyuki Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7128788Abstract: A manufacturing method for a buried insulating layer-type semiconductor silicon carbide substrate comprises the step of placing an SOI substrate 100, which has a surface silicon layer 130 of a predetermined thickness and a buried insulator 120, in a heating furnace 200 and of increasing the temperature of the atmosphere within heating furnace 200 while supplying a mixed gas (G1+G2) of a hydrogen gas G1 and of a hydrocarbon gas G2 into heating furnace 200, thereby, of metamorphosing surface silicon layer 130 of SOI substrate 100 into a single crystal silicon carbide thin film 140.Type: GrantFiled: March 18, 2004Date of Patent: October 31, 2006Assignees: Osaka Prefecture, Hosiden CorporationInventors: Katsutoshi Izumi, Motoi Nakao, Yoshiaki Ohbayashi, Keiji Mine, Seisaku Hirai, Fumihiko Jobe, Tomoyuki Tanaka
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Patent number: 7084049Abstract: A manufacturing method for a buried insulating layer-type semiconductor silicon carbide substrate comprises the step of placing an SOI substrate 100, which has a surface silicon layer 130 of a predetermined thickness and a buried insulator 120, in a heating furnace 200 and of increasing the temperature of the atmosphere within heating furnace 200 while supplying a mixed gas (G1+G2) of a hydrogen gas G1 and of a hydrocarbon gas G2 into heating furnace 200, thereby, of metamorphosing surface silicon layer 130 of SOI substrate 100 into a single crystal silicon carbide thin film 140.Type: GrantFiled: January 27, 2003Date of Patent: August 1, 2006Assignees: Osaka Prefecture, Hosiden CorporationInventors: Katsutoshi Izumi, Motoi Nakao, Yoshiaki Ohbayashi, Keiji Mine, Seisaku Hirai, Fumihiko Jobe, Tomoyuki Tanaka
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Patent number: 7077875Abstract: Provided is a manufacturing method of a buried insulating layer type semiconductor silicon carbide substrate excellent in flatness of an interfaces in contact the insulating layer and a manufacturing device thereof. In the manufacturing device, an SOI substrate having a buried insulating layer positioned on a silicon substrate and a surface silicon layer formed on this buried insulating layer is placed in this film formation chamber. The manufacturing device includes: the film formation chamber in which the SOI substrate is placed; a gas supplying unit for supplying various types of gasses required for the manufacturing of a buried insulating layer type semiconductor silicon carbide substrate into the film formation chamber; an infrared ray irradiating unit for irradiating the surface silicon layer of the SOI substrate with infrared rays; and a control part for controlling the gas supplying unit and the infrared ray irradiating unit.Type: GrantFiled: February 7, 2005Date of Patent: July 18, 2006Assignees: Osaka Prefecture, Hosiden CorporationInventors: Katsutoshi Izumi, Motoi Nakao, Yoshiaki Ohbayashi, Keiji Mine, Seisaku Hirai, Fumihiko Jobe, Tomoyuki Tanaka
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Publication number: 20060090143Abstract: A method for providing a simplified menu for a device, by providing a GUI for selecting setting items for display and setting values. Those settings that are different from the standard settings are displayed more prominently, resulting in a display that enables an instantaneous confirmation of the settings. Clicking on tabs to display different menu pages is unnecessary. Those settings that are the same as the standard settings are displayed less conspicuously, such as grayed-out or invisible. Methods include displaying the custom settings as the first tab in the menu, indicating that all the settings are standard, customizing factory-default settings of a printer device, assigning profile names, searching for a profile close to the current settings, differential tree that expands only the branches containing salient settings, associating a setting with another setting, and using a scripting language to specify the setting combinations.Type: ApplicationFiled: October 21, 2004Publication date: April 27, 2006Inventor: Tomoyuki Tanaka
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Publication number: 20060042378Abstract: A fuel tank cover body which can be easily manufactured. The fuel tank cover body comprises a cover 2 for closing the opening of a fuel tank; a liquid level detection unit 3 housed in the fuel tank; and a bracket 4 acting as a fixing portion for fixing the liquid level detection unit 3 and disposed in the cover 2. The cover 2 and the bracket 4 are integrally formed of a resin.Type: ApplicationFiled: July 14, 2003Publication date: March 2, 2006Inventors: Tomoyuki Tanaka, Koide Shigeki
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Publication number: 20050288492Abstract: The present invention relates to antibodies that function within an intracellular environment. In particular the present invention related to a particular antibodies which the inventors have shown to bind to the activated form of RAS. Uses of such an antibody are also described. Anti-activated RAS antibodies The present invention relates to antibodies that function within an intracellular environment. In particular the present invention relates to a particular antibodies which the inventors have shown to bind to the activated form of RAS. Uses of such an antibody are also described.Type: ApplicationFiled: May 12, 2005Publication date: December 29, 2005Inventors: Terrence Rabbitts, Tomoyuki Tanaka
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Publication number: 20050276800Abstract: The present invention related to antibodies that function within an intracellular environment. In particular the present invention relates to a particular antibody which the inventors have shown to bind to the oncogenic form of RAS. Uses of such an antibody are also described.Type: ApplicationFiled: May 12, 2005Publication date: December 15, 2005Inventors: Terrence Rabbitts, Tomoyuki Tanaka
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Publication number: 20050272107Abstract: The invention related to intracellular single domain immunoglobulins, and to a method for determining the ability of an immunoglobulin single domain to bind to a target in an intracellular environment, comprising the steps of: a) providing a first molecule and a second molecule, wherein stable interaction of the first and second molecules leads to the generation of a signal; b) providing a single intracellular immunoglobulin domain which is associated with the first molecule, said single immunoglobulin domain being free of complementary immunoglobulin domains; c) providing an intracellular target which is associated with the second molecule, such that association of the immunoglobulin domain and the target leads to stable interaction of the first and second molecules and generation of the signal; and d) assessing the intracellular interaction between the immunoglobulin domain and the target by monitoring the signal.Type: ApplicationFiled: May 12, 2005Publication date: December 8, 2005Inventors: Terrence Rabbitts, Tomoyuki Tanaka
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Patent number: 6927144Abstract: Provided is a manufacturing method of a buried insulating layer type semiconductor silicon carbide substrate excellent in flatness of an interfaces in contact the insulating layer and a manufacturing device thereof. In the manufacturing device, an SOI substrate having a buried insulating layer positioned on a silicon substrate and a surface silicon layer formed on this buried insulating layer is placed in this film formation chamber. The manufacturing device includes: the film formation chamber in which the SOI substrate is placed; a gas supplying unit for supplying various types of gasses required for the manufacturing of a buried insulating layer type semiconductor silicon carbide substrate into the film formation chamber; an infrared ray irradiating unit for irradiating the surface silicon layer of the SOI substrate with infrared rays; and a control part for controlling the gas supplying unit and the infrared ray irradiating unit.Type: GrantFiled: March 12, 2004Date of Patent: August 9, 2005Assignees: Osaka Prefecture, Hosiden CorporationInventors: Katsutoshi Izumi, Motoi Nakao, Yoshiaki Ohbayashi, Keiji Mine, Seisaku Hirai, Fumihiko Jobe, Tomoyuki Tanaka
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Publication number: 20050148108Abstract: There is provided a monocrystalline gallium nitride localized substrate suitable for manufacturing electronic-optical united devices in which electronic devices and optical devices are mixedly mounted on the same silicon substrate. An area in which monocrystalline gallium nitride 410 is grown is locally present on a silicon substrate 100 by forming silicon carbide 200 on the silicon substrate 100 to locally form the monocrystalline gallium nitride 410 on the above-mentioned silicon carbide 200. Silicon nitride 220 is used as a mask in forming the above-mentioned monocrystalline gallium nitride 410.Type: ApplicationFiled: February 14, 2005Publication date: July 7, 2005Applicants: Osaka Prefecture, Hosiden CorporationInventors: Katsutoshi Izumi, Motoi Nakao, Yoshiaki Ohbayashi, Keiji Mine, Seisaku Hirai, Fumihiko Jobe, Tomoyuki Tanaka
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Publication number: 20050136611Abstract: Provided is a manufacturing method of a buried insulating layer type semiconductor silicon carbide substrate excellent in flatness of an interfaces in contact the insulating layer and a manufacturing device thereof. In the manufacturing device, an SOI substrate having a buried insulating layer positioned on a silicon substrate and a surface silicon layer formed on this buried insulating layer is placed in this film formation chamber. The manufacturing device includes: the film formation chamber in which the SOI substrate is placed; a gas supplying unit for supplying various types of gasses required for the manufacturing of a buried insulating layer type semiconductor silicon carbide substrate into the film formation chamber; an infrared ray irradiating unit for irradiating the surface silicon layer of the SOI substrate with infrared rays; and a control part for controlling the gas supplying unit and the infrared ray irradiating unit.Type: ApplicationFiled: February 7, 2005Publication date: June 23, 2005Applicants: Osaka Prefecture, Hosiden CorporationInventors: Katsutoshi Izumi, Motoi Nakao, Yoshiaki Ohbayashi, Keiji Mine, Seisaku Hirai, Fumihiko Jobe, Tomoyuki Tanaka
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Publication number: 20040191966Abstract: Provided is a manufacturing method of a buried insulating layer type semiconductor silicon carbide substrate excellent in flatness of an interfaces in contact the insulating layer and a manufacturing device thereof. In the manufacturing device, an SOI substrate having a buried insulating layer positioned on a silicon substrate and a surface silicon layer formed on this buried insulating layer is placed in this film formation chamber. The manufacturing device includes: the film formation chamber in which the SOI substrate is placed; a gas supplying unit for supplying various types of gasses required for the manufacturing of a buried insulating layer type semiconductor silicon carbide substrate into the film formation chamber; an infrared ray irradiating unit for irradiating the surface silicon layer of the SOI substrate with infrared rays; and a control part for controlling the gas supplying unit and the infrared ray irradiating unit.Type: ApplicationFiled: March 12, 2004Publication date: September 30, 2004Applicants: OSAKA PREFECTURE,, HOSIDEN CORPORATIONInventors: Katsutoshi IZUMI, Motoi NAKAO, Yoshiaki OHBAYASHI, Keiji MINE, Seisaku HIRAI, Fumihiko JOBE, Tomoyuki TANAKA
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Publication number: 20040173154Abstract: A manufacturing method for a buried insulating layer-type semiconductor silicon carbide substrate comprises the step of placing an SOI substrate 100, which has a surface silicon layer 130 of a predetermined thickness and a buried insulator 120, in a heating furnace 200 and of increasing the temperature of the atmosphere within heating furnace 200 while supplying a mixed gas (G1+G2) of a hydrogen gas G1 and of a hydrocarbon gas G2 into heating furnace 200, thereby, of metamorphosing surface silicon layer 130 of SOI substrate 100 into a single crystal silicon carbide thin film 140.Type: ApplicationFiled: March 18, 2004Publication date: September 9, 2004Applicants: Osaka Prefecture, Hosiden CorporationInventors: Katsutoshi Izumi, Motoi Nakao, Yoshiaki Ohbayashi, Keiji Mine, Seisaku Hirai, Fumihiko Jobe, Tomoyuki Tanaka
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Publication number: 20040099871Abstract: There is provided a monocrystalline gallium nitride localized substrate suitable for manufacturing electronic-optical united devices in which electronic devices and optical devices are mixedly mounted on the same silicon substrate.Type: ApplicationFiled: November 4, 2003Publication date: May 27, 2004Applicants: OSAKA PREFECTURE, HOSIDEN CORPORATIONInventors: Katsutoshi Izumi, Motoi Nakao, Yoshiaki Ohbayashi, Keiji Mine, Seisaku Hirai, Fumihiko Jobe, Tomoyuki Tanaka
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Patent number: 6711950Abstract: There is provided a liquid level detecting apparatus capable of achieving miniaturization, which includes a float arm 2 provided with a float floating on a liquid surface, an arm holder 4 for holding the float arm 2 and provided with shaft portions 24 as rotation supporting points of the float arm 2, a main body frame 3 provided with two bearing portions 30 and 31 for axially supporting the shaft portions 24 of the arm holder 4, a circuit board 7 fixed to the main body frame 3, and a contact holding member 5 provided with a sliding contact 6 sliding on the circuit board 7 and fixed to the arm holder 4, and the arm holder 4 is positioned between the bearing portions 30 and 31 and holds the float arm 2 and the contact holding member 5.Type: GrantFiled: July 30, 2001Date of Patent: March 30, 2004Assignee: Nippon Seiki Co., Ltd.Inventors: Takayuki Yamaura, Tomoyuki Tanaka, Akira Sakamaki
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Publication number: 20030148586Abstract: A manufacturing method for a buried insulating layer-type semiconductor silicon carbide substrate comprises the step of placing an SOI substrate 100, which has a surface silicon layer 130, of a predetermined thickness and a buried insulator 120, in a heating furnace 200 and of increasing the temperature of the atmosphere within heating furnace 200 while supplying a mixed gas (G1+G2) of a hydrogen gas G1 and of a hydrocarbon gas G2 into heating furnace 200, thereby, of metamorphosing surface silicon layer 130 of SOI substrate 100 into a single crystal silicon carbide thin film 140.Type: ApplicationFiled: January 27, 2003Publication date: August 7, 2003Applicant: OSAKA PREFECTUREInventors: Katsutoshi Izumi, Motoi Nakao, Yoshiaki Ohbayashi, Keiji Mine, Seisaku Hirai, Fumihiko Jobe, Tomoyuki Tanaka
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Patent number: 5670811Abstract: The present invention is directed to a semiconductor device which can achieve high current density and which has a high reliability. In the insulated gate semiconductor device according to the present invention, a plurality of insulating gates are provided, with each two adjacent insulating gates being spaced from each other, the insulating gates being provided on a second semiconductor region of a first conductivity type. A first semiconductor region, of the same or different conductivity type from that of the second semiconductor region, extends from a surface of the second semiconductor region opposed to the surface thereof having the insulating gates thereon. A plurality of third semiconductor regions are provided in the second semiconductor region, between the insulating gates and aligned therewith, and two fourth semiconductor regions are provided extending into each of the third semiconductor regions, aligned with the sides of adjacent insulating gates.Type: GrantFiled: April 28, 1995Date of Patent: September 23, 1997Assignee: Hitachi, Ltd.Inventors: Mutsuhiro Mori, Tomoyuki Tanaka, Yasumichi Yasuda, Yasunori Nakano
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Patent number: 5453570Abstract: Disclosed is a karaoke authoring apparatus for mixing or authoring karaoke music data based on an electronic music sound source. The invention can analyze chronologically, in a sound reproduction block, the musical performance data expressed by a code such as MIDI code and has a pre-inserted event code, and will generate an interrupt in a timer circuit at a time interval based on the tempo instruction on the code. The invention can also acquire, as an individual file at the timing of the event code, an integrated value given by the timer circuit in accordance with the type of event, and combine and arrange these files in chronological order to calculate a time difference between consecutive event codes, for producing time data. The authored data allows color turning of the words of the music, page turning, presentation of the title of the music and a video image update which is performed accurately to the timing as planned, in synchronism with the musical performance.Type: GrantFiled: December 23, 1993Date of Patent: September 26, 1995Assignees: Ricoh Co., Ltd., Ricos Co., Ltd.Inventors: Toshihiko Umeda, Tomoyuki Tanaka, Masaaki Hamada, Yasuhiro Maruyama
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Patent number: 5417312Abstract: A semiconductor acceleration sensor is formed by a cantilever having a conductive movable electrode of predetermined mass at one end, at least one pair of fixed conductive electrodes which are stationary with respect to the movable electrode located on opposing sides of the movable electrode, and gaps provided between the movable electrode and the fixed electrodes. To prevent the movable electrode becoming fused to the contacted fixed electrode, in a first aspect of this invention, an insulating layer is provided between the movable electrode and fixed electrodes, the layer being either on the movable electrode or on the fixed electrodes and in a second aspect the movable electrode or, preferably, the fixed electrodes, are formed of a high melting point material. In such a second aspect, to improve adhesion between the high melting point material and a substrate to which the fixed electrodes are mounted, a lower melting point material is firstly coated on the substrates.Type: GrantFiled: November 3, 1993Date of Patent: May 23, 1995Assignees: Hitachi, Ltd., Hitachi Automotive Engineering Co., Inc.Inventors: Shigeki Tsuchitani, Seiko Suzuki, Tomoyuki Tanaka, Masayuki Miki, Masahiro Matsumoto, Norio Ichikawa, Hiromichi Ebine, Yukiko Sugisawa, Kanemasa Sato, Sadayasu Ueno, Yasuhiro Asano, Masanori Kubota, Masayoshi Suzuki
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Patent number: 5285094Abstract: The present invention relates to a semiconductor device having an n-type semiconductor region forming one of the main surfaces of a semiconductor substrate, with a plurality of p-type semiconductor regions formed in the n-type semiconductor region. Two exposed n-type semiconductor regions are formed on each of the p-type semiconductor regions, with a main electrode formed on the n-type semiconductor regions and the exposed p-type semiconductor region therebetween. An insulated gate extends from one of the n-type semiconductor regions in one of the p-type semiconductor regions to a closer one of the n-type semiconductor regions in an adjacent p-type semiconductor region. The length of the insulated gate is longer than a distance between adjacent insulated gates.Type: GrantFiled: July 29, 1992Date of Patent: February 8, 1994Assignee: Hitachi, Ltd.Inventors: Mutsuhiro Mori, Tomoyuki Tanaka, Yasumichi Yasuda, Yasunori Nakano