Patents by Inventor Tomoyuki Terashima

Tomoyuki Terashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Substrate including alignment columnar member and plural protection columnar members, and method of making the same
    Patent number: 8053910
    Abstract: To provide a semiconductor substrate whose columnar member for alignment is difficult to fall off and a manufacturing method thereof. An alignment mark 24 (columnar member for alignment) and protection posts 26 surrounding the alignment mark 24 to protect the alignment mark are disposed in an alignment mark forming region 14 of a semiconductor wafer 101 (semiconductor substrate). Each of the protection posts has a diameter (maximum diameter) of, for example, 0.6 ?m. The protection posts 26 are arranged such that the diameter of each of the columnar protection posts 26 is greater than a diameter (for example, 0.2 ?m) of the alignment mark 24. That is, the protection posts 26 are arranged such that the contact area between each of the protection posts 26 and an underlayer thereof (dummy wire layer 22) is greater than the contact area between the alignment mark 24 and an underlayer thereof (dummy wire layer 22).
    Type: Grant
    Filed: June 4, 2009
    Date of Patent: November 8, 2011
    Assignee: Oki Semiconductor Co., Ltd.
    Inventors: Tomoyuki Terashima, Hirokazu Uchida
  • SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF
    Publication number: 20090302486
    Abstract: To provide a semiconductor substrate whose columnar member for alignment is difficult to fall off and a manufacturing method thereof. An alignment mark 24 (columnar member for alignment) and protection posts 26 surrounding the alignment mark 24 to protect the alignment mark are disposed in an alignment mark forming region 14 of a semiconductor wafer 101 (semiconductor substrate). Each of the protection posts has a diameter (maximum diameter) of, for example, 0.6 ?m. The protection posts 26 are arranged such that the diameter of each of the columnar protection posts 26 is greater than a diameter (for example, 0.2 ?m) of the alignment mark 24. That is, the protection posts 26 are arranged such that the contact area between each of the protection posts 26 and an underlayer thereof (dummy wire layer 22) is greater than the contact area between the alignment mark 24 and an underlayer thereof (dummy wire layer 22).
    Type: Application
    Filed: June 4, 2009
    Publication date: December 10, 2009
    Applicant: OKI SEMICONDUCTOR CO., LTD.
    Inventors: Tomoyuki Terashima, Hirokazu Uchida