Patents by Inventor Tomoyuki Umeda
Tomoyuki Umeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20220239178Abstract: A brushless electric motor includes a rotor rotatable about an axis of rotation, a stator that surrounds the rotor externally and includes a stator core and coils wound on the stator core, and a busbar assembly including a busbar holder surrounding first busbars. The windings are made of a winding wire including a first end portion on one side and a second end portion on another side of the winding wire. The first busbars are electrically contacted with the second end portions, the busbar holder being placed on a top of the stator, and the busbar holder includes fastening arms which engage in longitudinal grooves of the stator.Type: ApplicationFiled: January 26, 2022Publication date: July 28, 2022Inventors: Kosuke OGAWA, Tomoyuki UMEDA, Farhad KHOSRAVI
-
Publication number: 20220166278Abstract: A stator includes a stator core with stator teeth, each of which is at least partially surrounded by an insulator which includes a winding chamber with a winding space. The winding space is bounded on an inner side by an inner flange and on an outer side by an outer flange. The stator includes coils wound around the insulators in the winding space, the windings of the coils being defined by a winding wire including a first winding wire end portion on one side of the winding wire and a second winding wire end portion on another side of the winding wire. The outer flange of the insulator includes a first recess, and a second recess, which is on the end surface on the inner side and into which in each case one of the two winding wire end sections is inserted.Type: ApplicationFiled: November 24, 2021Publication date: May 26, 2022Inventors: Kosuke OGAWA, Tomoyuki UMEDA
-
Publication number: 20220166277Abstract: A stator includes a rotationally symmetrical stator core with stator teeth, each of which is at least partially surrounded by an insulator which includes a winding chamber with a winding space, the winding space being bounded on an inner side by an inner flange and on the outer side by an outer flange. The stator includes coils wound around the insulators in the winding space, the windings of which coils include a winding wire including a first winding wire end portion on one side of the winding wire and a second winding wire end portion on another side of the winding wire. The outer flange of the insulator includes two recesses on its inner side at the end surface, into each of which recesses one of the two winding wire end sections is inserted and fixed.Type: ApplicationFiled: November 24, 2021Publication date: May 26, 2022Inventors: Kosuke Ogawa, Tomoyuki Umeda
-
Patent number: 10778918Abstract: A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell includes two pixels. Upper and lower photoelectric converters and, transfer transistors and connected to the upper and lower photoelectric converters, respectively, a reset transistor, and an amplifying transistor form the two pixels. A full-face signal line is connected to the respective drains of the reset transistor and the amplifying transistor. Controlling the full-face signal line, along with transfer signal lines and a reset signal line, to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.Type: GrantFiled: July 15, 2019Date of Patent: September 15, 2020Assignee: Sony CorporationInventors: Takashi Abe, Nobuo Nakamura, Tomoyuki Umeda, Keiji Mabuchi, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato
-
Patent number: 10506188Abstract: A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell includes two pixels. Upper and lower photoelectric converters and, transfer transistors and connected to the upper and lower photoelectric converters, respectively, a reset transistor, and an amplifying transistor form the two pixels. A full-face signal line is connected to the respective drains of the reset transistor and the amplifying transistor. Controlling the full-face signal line, along with transfer signal lines and a reset signal line, to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.Type: GrantFiled: November 27, 2018Date of Patent: December 10, 2019Assignee: Sony CorporationInventors: Takashi Abe, Nobuo Nakamura, Tomoyuki Umeda, Keiji Mabuchi, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato
-
Publication number: 20190342512Abstract: A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell includes two pixels. Upper and lower photoelectric converters and, transfer transistors and connected to the upper and lower photoelectric converters, respectively, a reset transistor, and an amplifying transistor form the two pixels. A full-face signal line is connected to the respective drains of the reset transistor and the amplifying transistor. Controlling the full-face signal line, along with transfer signal lines and a reset signal line, to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.Type: ApplicationFiled: July 15, 2019Publication date: November 7, 2019Applicant: SONY CORPORATIONInventors: Takashi Abe, Nobuo Nakamura, Tomoyuki Umeda, Keiji Mabuchi, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato
-
Publication number: 20190174083Abstract: A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell includes two pixels. Upper and lower photoelectric converters and, transfer transistors and connected to the upper and lower photoelectric converters, respectively, a reset transistor, and an amplifying transistor form the two pixels. A full-face signal line is connected to the respective drains of the reset transistor and the amplifying transistor. Controlling the full-face signal line, along with transfer signal lines and a reset signal line, to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.Type: ApplicationFiled: November 27, 2018Publication date: June 6, 2019Inventors: Takashi Abe, Nobuo Nakamura, Tomoyuki Umeda, Keiji Mabuchi, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato
-
Patent number: 10263033Abstract: Forming a back-illuminated type CMOS image sensor, includes process for formation of a registration mark on the wiring side of a silicon substrate during formation of an active region or a gate electrode. A silicide film using an active region may also be used for the registration mark. Thereafter, the registration mark is read from the back-side by use of red light or near infrared rays, and registration of the stepper is accomplished. It is also possible to form a registration mark in a silicon oxide film on the back-side (illuminated side) in registry with the registration mark on the wiring side, and to achieve the desired registration by use of the registration mark thus formed.Type: GrantFiled: December 29, 2017Date of Patent: April 16, 2019Assignee: Sony CorporationInventors: Takashi Abe, Nobuo Nakamura, Keiji Mabuchi, Tomoyuki Umeda, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato
-
Publication number: 20190036426Abstract: A motor may include a rotor rotating on a central axis; a stator located radially outside the rotor; a bearing supporting the rotor such that the rotor is rotatable with respect to the stator; and a holder that holds the stator. The stator may include a stator core; and a coil. The holder may include a cover disposed on an axially first side of the coil; and a bracket that is electrically connected to and fixed to the cover, is disposed on an axially second side of the coil, and is connectable to a ground. The holder may have an opening that penetrates the holder in a radial direction and is located between the axially first-side end of the coil and the cover, and an opening that penetrates the holder in the radial direction and is located between the axially second-side end of the coil and the bracket.Type: ApplicationFiled: October 1, 2018Publication date: January 31, 2019Inventors: Tomoyuki UMEDA, Takayuki MIGITA
-
Publication number: 20190036403Abstract: A motor may include a rotor that rotates on a central axis; and a stator that is located radially outside the rotor. The rotor may include a rotor core; and a resin portion that is provided to cover at least a part of the rotor core. The rotor core has a plurality of through-holes that penetrate the rotor core in an axial direction. The resin portion may include a first resin portion that is provided to cover at least a part of an axially first-side end face of the rotor core; and an extension that is provided in at least one of the through-holes and extends from the first resin portion through the through-hole in the axial direction. The first resin portion may include a protrusion that protrudes toward an axially first side. The protrusion and the extension may overlap with each other as seen in axial plan view.Type: ApplicationFiled: October 1, 2018Publication date: January 31, 2019Inventors: Tomoyuki UMEDA, Takayuki MIGITA
-
Patent number: 10165212Abstract: A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell includes two pixels. Upper and lower photoelectric converters and, transfer transistors and connected to the upper and lower photoelectric converters, respectively, a reset transistor, and an amplifying transistor form the two pixels. A full-face signal line is connected to the respective drains of the reset transistor and the amplifying transistor. Controlling the full-face signal line, along with transfer signal lines and a reset signal line, to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.Type: GrantFiled: August 17, 2017Date of Patent: December 25, 2018Assignee: Sony CorporationInventors: Takashi Abe, Nobuo Nakamura, Tomoyuki Umeda, Keiji Mabuchi, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato
-
Publication number: 20180122849Abstract: Forming a back-illuminated type CMOS image sensor, includes process for formation of a registration mark on the wiring side of a silicon substrate during formation of an active region or a gate electrode. A silicide film using an active region may also be used for the registration mark. Thereafter, the registration mark is read from the back-side by use of red light or near infrared rays, and registration of the stepper is accomplished. It is also possible to form a registration mark in a silicon oxide film on the back-side (illuminated side) in registry with the registration mark on the wiring side, and to achieve the desired registration by use of the registration mark thus formed.Type: ApplicationFiled: December 29, 2017Publication date: May 3, 2018Inventors: Takashi Abe, Nobuo Nakamura, Keiji Mabuchi, Tomoyuki Umeda, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato
-
Publication number: 20180041725Abstract: A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell includes two pixels. Upper and lower photoelectric converters and, transfer transistors and connected to the upper and lower photoelectric converters, respectively, a reset transistor, and an amplifying transistor form the two pixels. A full-face signal line is connected to the respective drains of the reset transistor and the amplifying transistor. Controlling the full-face signal line, along with transfer signal lines and a reset signal line, to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.Type: ApplicationFiled: August 17, 2017Publication date: February 8, 2018Inventors: Takashi Abe, Nobuo Nakamura, Tomoyuki Umeda, Keiji Mabuchi, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato
-
Patent number: 9859324Abstract: Forming a back-illuminated type CMOS image sensor, includes process for formation of a registration mark on the wiring side of a silicon substrate during formation of an active region or a gate electrode. A silicide film using an acitve region may also be used for the registration mark. Thereafter, the registration mark is read from the back-side by use of red light or near infrared rays, and registration of the stepper is accomplished. It is also possible to form a registration mark in a silicon oxide film on the back-side (illuminated side) in registry with the registration mark on the wiring side, and to achieve the desired registration by use of the registration mark thus formed.Type: GrantFiled: August 1, 2016Date of Patent: January 2, 2018Assignee: Sony CorporationInventors: Takashi Abe, Nobuo Nakamura, Keiji Mabuchi, Tomoyuki Umeda, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato
-
Patent number: 9832405Abstract: A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell includes two pixels. Upper and lower photoelectric converters and, transfer transistors and connected to the upper and lower photoelectric converters, respectively, a reset transistor, and an amplifying transistor form the two pixels. A full-face signal line is connected to the respective drains of the reset transistor and the amplifying transistor. Controlling the full-face signal line, along with transfer signal lines and a reset signal line, to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.Type: GrantFiled: May 20, 2016Date of Patent: November 28, 2017Assignee: Sony CorporationInventors: Takashi Abe, Nobuo Nakamura, Tomoyuki Umeda, Keiji Mabuchi, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato
-
Patent number: 9530816Abstract: Forming a back-illuminated type CMOS image sensor, includes process for formation of a registration mark on the wiring side of a silicon substrate during formation of an active region or a gate electrode. A silicide film using an active region may also be used for the registration mark. Thereafter, the registration mark is read from the back-side by use of red light or near infrared rays, and registration of the stepper is accomplished. It is also possible to form a registration mark in a silicon oxide film on the back-side (illuminated side) in registry with the registration mark on the wiring side, and to achieve the desired registration by use of the registration mark thus formed.Type: GrantFiled: January 30, 2015Date of Patent: December 27, 2016Assignee: Sony CorporationInventors: Takashi Abe, Nobuo Nakamura, Keiji Mabuchi, Tomoyuki Umeda, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato
-
Publication number: 20160343768Abstract: Forming a back-illuminated type CMOS image sensor, includes process for formation of a registration mark on the wiring side of a silicon substrate during formation of an active region or a gate electrode. A silicide film using an active region may also be used for the registration mark. Thereafter, the registration mark is read from the back-side by use of red light or near infrared rays, and registration of the stepper is accomplished. It is also possible to form a registration mark in a silicon oxide film on the back-side (illuminated side) in registry with the registration mark on the wiring side, and to achieve the desired registration by use of the registration mark thus formed.Type: ApplicationFiled: August 1, 2016Publication date: November 24, 2016Inventors: Takashi Abe, Nobuo Nakamura, Keiji Mabuchi, Tomoyuki Umeda, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato
-
Publication number: 20160269665Abstract: A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell includes two pixels. Upper and lower photoelectric converters and, transfer transistors and connected to the upper and lower photoelectric converters, respectively, a reset transistor, and an amplifying transistor form the two pixels. A full-face signal line is connected to the respective drains of the reset transistor and the amplifying transistor. Controlling the full-face signal line, along with transfer signal lines and a reset signal line, to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.Type: ApplicationFiled: May 20, 2016Publication date: September 15, 2016Inventors: Takashi Abe, Nobuo Nakamura, Tomoyuki Umeda, Keiji Mabuchi, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato
-
Patent number: 9374505Abstract: A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell (30) includes two pixels (31) and (32). Upper and lower photoelectric converters (33) and (34), transfer transistors (35) and (36) connected to the upper and lower photoelectric converters, respectively, a reset transistor (37), and an amplifying transistor (38) form the two pixels (31) and (32). A full-face signal line 39 is connected to the respective drains of the reset transistor (37) and the amplifying transistor (38). Controlling the full-face signal line (39), along with transfer signal lines (42) and (43) and a reset signal line (41), to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.Type: GrantFiled: September 24, 2015Date of Patent: June 21, 2016Assignee: Sony CorporationInventors: Takashi Abe, Nobuo Nakamura, Tomoyuki Umeda, Keiji Mabuchi, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato
-
Publication number: 20160014304Abstract: A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell (30) includes two pixels (31) and (32). Upper and lower photoelectric converters (33) and (34), transfer transistors (35) and (36) connected to the upper and lower photoelectric converters, respectively, a reset transistor (37), and an amplifying transistor (38) form the two pixels (31) and (32). A full-face signal line 39 is connected to the respective drains of the reset transistor (37) and the amplifying transistor (38). Controlling the full-face signal line (39), along with transfer signal lines (42) and (43) and a reset signal line (41), to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.Type: ApplicationFiled: September 24, 2015Publication date: January 14, 2016Inventors: Takashi Abe, Nobuo Nakamura, Tomoyuki Umeda, Keiji Mabuchi, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato