Abstract: A digital potentiometer includes a string of impedance units in series. The string includes identical first and second sets of impedance units whose individual impedance values increment by a power of two. One of a plurality of switches is coupled in parallel with each respective impedance unit. The switches that are coupled to the first set of impedance units receive logical control signals complementary to logical control signals received by the respective switches coupled to the second set of impedance units, so that for every impedance unit of the first set that is bypassed (not bypassed), the identical impedance unit of the second set is not bypassed (bypassed). The string may include only the first and second sets of impedance units, or may include at least one third impedance unit in series with the first and second sets in a multi-stage design.