Patents by Inventor Tonio Buonassisi

Tonio Buonassisi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11002597
    Abstract: A solar spectrum sensor, a consumer device and a method for determining an ambient solar spectrum. The solar spectrum sensor comprises a sensor unit configured for generating respective photo current outputs responsive to different parts of the solar spectrum; a measurement unit configured for measuring the respective photo current outputs from the sensor unit; and a processing unit for determining an average photon energy, APE, value of the solar spectrum from the measured photo current outputs and for determining the solar spectrum based on the determined APE.
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: May 11, 2021
    Assignees: MASSACHUSETTS INSTITUTE OF TECHNOLOGY, NATIONAL UNIVERSITY OF SINGAPORE
    Inventors: Ian Marius Peters, Tonio Buonassisi, Haohui Liu, Sterling Watson, Nasim Sahraei Khanghah, Anthony Pennes, Zekun Ren
  • Patent number: 10724965
    Abstract: Embodiments related to systems and methods of crack detection in wafers (e.g., silicon wafers for photovoltaics, photovoltaic devices including silicon wafers) are disclosed. In some embodiments, an apparatus may include a light source configured to illuminate a side of a wafer and a camera directed towards a first face of the wafer. In some embodiments, a long axis of a field of view of the camera may be angled relative to a propagation direction of the light source. In some embodiments, at least a portion of the field of view of the camera is offset from the path of propagation of light emitted from the light source through the wafer. In some embodiments, at least a portion of a light beam may be oriented at a positive non-zero angle relative to the first face of the wafer, and a dimension of the light beam normal to the first face of the wafer may be larger than a thickness of the wafer.
    Type: Grant
    Filed: February 8, 2019
    Date of Patent: July 28, 2020
    Assignee: Massachusetts Institute of Technology
    Inventors: Emanuel M. Sachs, Tonio Buonassisi, Sarah Wieghold, Zhe Liu
  • Publication number: 20200127153
    Abstract: Embodiments related to solar modules and their manufacture are disclosed. In one embodiment, a solar module may include first and second solar cells with first and second interconnection wires disposed on upper and lower surfaces of one and/or both of the solar cells, and a cross-connect wire disposed between the solar cells and electrically connected to the first and second interconnection wires. A portion of each of the first and second interconnection wires may be removed to electrically isolate the upper surfaces from the lower surfaces of each solar cell while retaining an electrical connection between the upper surface of one cell with the lower surface of the adjoining solar cell through the cross-connect wire. In some embodiments, the first and second interconnection wires may be arranged as a plurality of offset wires located on opposing sides of the solar cells which may reduce stresses applied to the solar cells.
    Type: Application
    Filed: June 26, 2018
    Publication date: April 23, 2020
    Applicant: Massachusetts Institute of Technology
    Inventors: Emanuel Sachs, Tonio Buonassisi, Luke Thomas Meyer
  • Patent number: 10535791
    Abstract: A 2-terminal multi-junction solar cell having a thin film of metal halide semiconductor as the top solar-cell material and crystalline silicon as the bottom solar-cell material. In the illustrative embodiment, the top solar-cell material is a perovskite of the form AM(IxH1-x)3, where A is a cation, preferably methylammonium (CH3NH3), formamidinium ([R2N—CH?NR2]+), or cesium; M is metal, preferably Pb, Sn, Ge; H is a halide, preferably Br or Cl; and x=iodine fraction, in the range of 0 to 1, inclusive. The integration of the two solar-cell materials is enabled by the use of a tunnel junction composed of indirect band-gap material.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: January 14, 2020
    Assignees: The Board of Trustees of the Leland Stanford Junior University, Massachusetts Institute of Technology
    Inventors: Jonathan P. Mailoa, Colin David Bailie, Eric Carl Johlin, Michael David McGehee, Tonio Buonassisi
  • Publication number: 20190331525
    Abstract: A solar spectrum sensor, a consumer device and a method for determining an ambient solar spectrum. The solar spectrum sensor comprises a sensor unit configured for generating respective photo current outputs responsive to different parts of the solar spectrum; a measurement unit configured for measuring the respective photo current outputs from the sensor unit; and a processing unit for determining an average photon energy, APE, value of the solar spectrum from the measured photo current outputs and for determining the solar spectrum based on the determined APE.
    Type: Application
    Filed: September 13, 2017
    Publication date: October 31, 2019
    Inventors: Ian Marius PETERS, Tonio BUONASSISI, Haohui LIU, Sterling WATSON, Nasim SAHRAEI KHANGHAH, Anthony PENNES, Zekun REN
  • Publication number: 20190250108
    Abstract: Embodiments related to systems and methods of crack detection in wafers (e.g., silicon wafers for photovoltaics, photovoltaic devices including silicon wafers) are disclosed. In some embodiments, an apparatus may include a light source configured to illuminate a side of a wafer and a camera directed towards a first face of the wafer. In some embodiments, a long axis of a field of view of the camera may be angled relative to a propagation direction of the light source. In some embodiments, at least a portion of the field of view of the camera is offset from the path of propagation of light emitted from the light source through the wafer. In some embodiments, at least a portion of a light beam may be oriented at a positive non-zero angle relative to the first face of the wafer, and a dimension of the light beam normal to the first face of the wafer may be larger than a thickness of the wafer.
    Type: Application
    Filed: February 8, 2019
    Publication date: August 15, 2019
    Applicant: Massachusetts Institute of Technology
    Inventors: Emanuel M. Sachs, Tonio Buonassisi, Sarah Wieghold, Zhe Liu
  • Patent number: 9656294
    Abstract: Embodiments described herein are related to methods for processing substrates such as silicon substrates. In some cases, the method may provide the ability to passivate a silicon surface at relatively low temperatures and/or in the absence of a solvent. Methods described herein may be useful in the fabrication of a wide range of devices, including electronic devices such as photovoltaic devices, solar cells, organic light-emitting diodes, sensors, and the like.
    Type: Grant
    Filed: November 20, 2013
    Date of Patent: May 23, 2017
    Assignee: Massachusetts Institute of Technology
    Inventors: Karen K. Gleason, Rong Yang, Yaron Segal, Tonio Buonassisi, Baby Reeja Jayan
  • Publication number: 20160163904
    Abstract: A 2-terminal multi-junction solar cell having a thin film of metal halide semiconductor as the top solar-cell material and crystalline silicon as the bottom solar-cell material. In the illustrative embodiment, the top solar-cell material is a perovskite of the form AM(IxH1-x)3, where A is a cation, preferably methylammonium (CH3NH3), formamidinium ([R2N—CH?NR2]+), or cesium; M is metal, preferably Pb, Sn, Ge; H is a halide, preferably Br or Cl; and x=iodine fraction, in the range of 0 to 1, inclusive. The integration of the two solar-cell materials is enabled by the use of a tunnel junction composed of indirect band-gap material.
    Type: Application
    Filed: December 3, 2015
    Publication date: June 9, 2016
    Inventors: Jonathan P. Mailoa, Colin David Bailie, Eric Carl Johlin, Michael David McGehee, Tonio Buonassisi
  • Patent number: 8969183
    Abstract: Method for making thin crystalline or polycrystalline layers. The method includes electrochemically etching a crystalline silicon template to form a porous double layer thereon, the double layer including a highly porous deeper layer and a less porous shallower layer. The shallower layer is irradiated with a short laser pulse selected to recrystallize the shallower layer resulting in a crystalline layer. Silicon is deposited on the recrystallized shallower layer and the silicon is irradiated with a short laser pulse selected to crystalize the silicon leaving a layer of crystallized silicon on the template. Thereafter, the layer of crystallized silicon is separated from the template. The process of the invention can be used to make optoelectronic devices.
    Type: Grant
    Filed: October 25, 2012
    Date of Patent: March 3, 2015
    Assignees: President and Fellows of Harvard College, Massachusetts Institute of Technology
    Inventors: Mark T. Winkler, Tonio Buonassisi, Riley E. Brandt, Michael J. Aziz, Austin Joseph Akey
  • Publication number: 20140186620
    Abstract: Embodiments described herein are related to methods for processing substrates such as silicon substrates. In some cases, the method may provide the ability to passivate a silicon surface at relatively low temperatures and/or in the absence of a solvent. Methods described herein may be useful in the fabrication of a wide range of devices, including electronic devices such as photovoltaic devices, solar cells, organic light-emitting diodes, sensors, and the like.
    Type: Application
    Filed: November 20, 2013
    Publication date: July 3, 2014
    Inventors: Karen K. Gleason, Rong Yang, Yaron Segal, Tonio Buonassisi, Baby Reeja Jayan
  • Publication number: 20130288463
    Abstract: Method for making thin crystalline or polycrystalline layers. The method includes electrochemically etching a crystalline silicon template to form a porous double layer thereon, the double layer including a highly porous deeper layer and a less porous shallower layer. The shallower layer is irradiated with a short laser pulse selected to recrystallize the shallower layer resulting in a crystalline layer. Silicon is deposited on the recrystallized shallower layer and the silicon is irradiated with a short laser pulse selected to crystalize the silicon leaving a layer of crystallized silicon on the template. Thereafter, the layer of crystallized silicon is separated from the template. The process of the invention can be used to make optoelectronic devices.
    Type: Application
    Filed: October 25, 2012
    Publication date: October 31, 2013
    Inventors: Mark T. Winkler, Tonio Buonassisi, Riley E. Brandt, Michael J. Aziz, Austin Joseph Akey
  • Publication number: 20090184382
    Abstract: A crystalline material structure is provided. The crystalline material structure includes a semiconductor structure being annealed at temperatures above the brittle-to-ductile transition temperature of the semiconductor structure, and cooled in an approximately linear time-temperature profile down to approximately its respective transition temperature T0.
    Type: Application
    Filed: January 23, 2009
    Publication date: July 23, 2009
    Inventors: Katherine Hartman, James Serdy, Tonio Buonassisi