Patents by Inventor Tonio Buonassisi
Tonio Buonassisi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240307842Abstract: The present disclosure generally relates to a flow reactor system (100) and a flow reaction method (200). The flow reactor system (100) comprises liquid pumps (110) for communicating liquid reagents based on a set of flow conditions, a fluid pump (200) for communicating a carrier fluid that is immiscible with the liquid reagents; a fluidic mixer (130) for mixing the liquid reagents into a liquid mixture, a measurement device (150) for measuring properties of liquid plugs (140) discharged from an outlet (136) of the fluidic mixer (130); and a control module configured for controlling the liquid pumps (110) and adjusting the flow conditions based on the measured properties of the liquid plugs (140), wherein the liquid plugs (140) are representative of different flow conditions.Type: ApplicationFiled: July 20, 2022Publication date: September 19, 2024Inventors: Yee Fun LIM, Yang XU, Jian Wei Jayce CHENG, Swee Liang WONG, Vijila CHELLAPPAN, Jatin KUMAR, Daniil BASH, Tonio BUONASSISI, Kedar HIPPALGAONKAR
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Publication number: 20240273869Abstract: A data collection apparatus (10) and a computer-implemented data collection method (50) using the same are provided. The data collection apparatus (10) includes a first linear stage (12) and a second linear stage (14). A sample carriage (16) is attached to the first linear stage (12), the first linear stage (12) being operable to move the sample carriage (16) along a first axis. A probe carriage (18) is attached to the second linear stage (14), the second linear stage (14) being operable to move the probe carriage (18) along a second axis. A third linear stage (20) is attached to the probe carriage (18). In use, the third linear stage (20) is operable to receive a detachable characterisation probe (22) and to move the characterisation probe (22) along a third axis. A camera (24) is attached to the probe carriage (18). In use, the camera (24) is configured to capture an image of one or more samples on the sample carriage (16).Type: ApplicationFiled: June 30, 2022Publication date: August 15, 2024Applicant: Agency for Science, Technology and ResearchInventors: Jian Wei Jayce CHENG, Pawan KUMAR, Anas ABUTAHA, Daniil BASH, Tonio BUONASSISI, Kedar HIPPALGAONKAR
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Patent number: 11002597Abstract: A solar spectrum sensor, a consumer device and a method for determining an ambient solar spectrum. The solar spectrum sensor comprises a sensor unit configured for generating respective photo current outputs responsive to different parts of the solar spectrum; a measurement unit configured for measuring the respective photo current outputs from the sensor unit; and a processing unit for determining an average photon energy, APE, value of the solar spectrum from the measured photo current outputs and for determining the solar spectrum based on the determined APE.Type: GrantFiled: September 13, 2017Date of Patent: May 11, 2021Assignees: MASSACHUSETTS INSTITUTE OF TECHNOLOGY, NATIONAL UNIVERSITY OF SINGAPOREInventors: Ian Marius Peters, Tonio Buonassisi, Haohui Liu, Sterling Watson, Nasim Sahraei Khanghah, Anthony Pennes, Zekun Ren
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Patent number: 10724965Abstract: Embodiments related to systems and methods of crack detection in wafers (e.g., silicon wafers for photovoltaics, photovoltaic devices including silicon wafers) are disclosed. In some embodiments, an apparatus may include a light source configured to illuminate a side of a wafer and a camera directed towards a first face of the wafer. In some embodiments, a long axis of a field of view of the camera may be angled relative to a propagation direction of the light source. In some embodiments, at least a portion of the field of view of the camera is offset from the path of propagation of light emitted from the light source through the wafer. In some embodiments, at least a portion of a light beam may be oriented at a positive non-zero angle relative to the first face of the wafer, and a dimension of the light beam normal to the first face of the wafer may be larger than a thickness of the wafer.Type: GrantFiled: February 8, 2019Date of Patent: July 28, 2020Assignee: Massachusetts Institute of TechnologyInventors: Emanuel M. Sachs, Tonio Buonassisi, Sarah Wieghold, Zhe Liu
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Publication number: 20200127153Abstract: Embodiments related to solar modules and their manufacture are disclosed. In one embodiment, a solar module may include first and second solar cells with first and second interconnection wires disposed on upper and lower surfaces of one and/or both of the solar cells, and a cross-connect wire disposed between the solar cells and electrically connected to the first and second interconnection wires. A portion of each of the first and second interconnection wires may be removed to electrically isolate the upper surfaces from the lower surfaces of each solar cell while retaining an electrical connection between the upper surface of one cell with the lower surface of the adjoining solar cell through the cross-connect wire. In some embodiments, the first and second interconnection wires may be arranged as a plurality of offset wires located on opposing sides of the solar cells which may reduce stresses applied to the solar cells.Type: ApplicationFiled: June 26, 2018Publication date: April 23, 2020Applicant: Massachusetts Institute of TechnologyInventors: Emanuel Sachs, Tonio Buonassisi, Luke Thomas Meyer
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Patent number: 10535791Abstract: A 2-terminal multi-junction solar cell having a thin film of metal halide semiconductor as the top solar-cell material and crystalline silicon as the bottom solar-cell material. In the illustrative embodiment, the top solar-cell material is a perovskite of the form AM(IxH1-x)3, where A is a cation, preferably methylammonium (CH3NH3), formamidinium ([R2N—CH?NR2]+), or cesium; M is metal, preferably Pb, Sn, Ge; H is a halide, preferably Br or Cl; and x=iodine fraction, in the range of 0 to 1, inclusive. The integration of the two solar-cell materials is enabled by the use of a tunnel junction composed of indirect band-gap material.Type: GrantFiled: December 3, 2015Date of Patent: January 14, 2020Assignees: The Board of Trustees of the Leland Stanford Junior University, Massachusetts Institute of TechnologyInventors: Jonathan P. Mailoa, Colin David Bailie, Eric Carl Johlin, Michael David McGehee, Tonio Buonassisi
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Publication number: 20190331525Abstract: A solar spectrum sensor, a consumer device and a method for determining an ambient solar spectrum. The solar spectrum sensor comprises a sensor unit configured for generating respective photo current outputs responsive to different parts of the solar spectrum; a measurement unit configured for measuring the respective photo current outputs from the sensor unit; and a processing unit for determining an average photon energy, APE, value of the solar spectrum from the measured photo current outputs and for determining the solar spectrum based on the determined APE.Type: ApplicationFiled: September 13, 2017Publication date: October 31, 2019Inventors: Ian Marius PETERS, Tonio BUONASSISI, Haohui LIU, Sterling WATSON, Nasim SAHRAEI KHANGHAH, Anthony PENNES, Zekun REN
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Publication number: 20190250108Abstract: Embodiments related to systems and methods of crack detection in wafers (e.g., silicon wafers for photovoltaics, photovoltaic devices including silicon wafers) are disclosed. In some embodiments, an apparatus may include a light source configured to illuminate a side of a wafer and a camera directed towards a first face of the wafer. In some embodiments, a long axis of a field of view of the camera may be angled relative to a propagation direction of the light source. In some embodiments, at least a portion of the field of view of the camera is offset from the path of propagation of light emitted from the light source through the wafer. In some embodiments, at least a portion of a light beam may be oriented at a positive non-zero angle relative to the first face of the wafer, and a dimension of the light beam normal to the first face of the wafer may be larger than a thickness of the wafer.Type: ApplicationFiled: February 8, 2019Publication date: August 15, 2019Applicant: Massachusetts Institute of TechnologyInventors: Emanuel M. Sachs, Tonio Buonassisi, Sarah Wieghold, Zhe Liu
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Patent number: 9656294Abstract: Embodiments described herein are related to methods for processing substrates such as silicon substrates. In some cases, the method may provide the ability to passivate a silicon surface at relatively low temperatures and/or in the absence of a solvent. Methods described herein may be useful in the fabrication of a wide range of devices, including electronic devices such as photovoltaic devices, solar cells, organic light-emitting diodes, sensors, and the like.Type: GrantFiled: November 20, 2013Date of Patent: May 23, 2017Assignee: Massachusetts Institute of TechnologyInventors: Karen K. Gleason, Rong Yang, Yaron Segal, Tonio Buonassisi, Baby Reeja Jayan
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Publication number: 20160163904Abstract: A 2-terminal multi-junction solar cell having a thin film of metal halide semiconductor as the top solar-cell material and crystalline silicon as the bottom solar-cell material. In the illustrative embodiment, the top solar-cell material is a perovskite of the form AM(IxH1-x)3, where A is a cation, preferably methylammonium (CH3NH3), formamidinium ([R2N—CH?NR2]+), or cesium; M is metal, preferably Pb, Sn, Ge; H is a halide, preferably Br or Cl; and x=iodine fraction, in the range of 0 to 1, inclusive. The integration of the two solar-cell materials is enabled by the use of a tunnel junction composed of indirect band-gap material.Type: ApplicationFiled: December 3, 2015Publication date: June 9, 2016Inventors: Jonathan P. Mailoa, Colin David Bailie, Eric Carl Johlin, Michael David McGehee, Tonio Buonassisi
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Patent number: 8969183Abstract: Method for making thin crystalline or polycrystalline layers. The method includes electrochemically etching a crystalline silicon template to form a porous double layer thereon, the double layer including a highly porous deeper layer and a less porous shallower layer. The shallower layer is irradiated with a short laser pulse selected to recrystallize the shallower layer resulting in a crystalline layer. Silicon is deposited on the recrystallized shallower layer and the silicon is irradiated with a short laser pulse selected to crystalize the silicon leaving a layer of crystallized silicon on the template. Thereafter, the layer of crystallized silicon is separated from the template. The process of the invention can be used to make optoelectronic devices.Type: GrantFiled: October 25, 2012Date of Patent: March 3, 2015Assignees: President and Fellows of Harvard College, Massachusetts Institute of TechnologyInventors: Mark T. Winkler, Tonio Buonassisi, Riley E. Brandt, Michael J. Aziz, Austin Joseph Akey
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Publication number: 20140186620Abstract: Embodiments described herein are related to methods for processing substrates such as silicon substrates. In some cases, the method may provide the ability to passivate a silicon surface at relatively low temperatures and/or in the absence of a solvent. Methods described herein may be useful in the fabrication of a wide range of devices, including electronic devices such as photovoltaic devices, solar cells, organic light-emitting diodes, sensors, and the like.Type: ApplicationFiled: November 20, 2013Publication date: July 3, 2014Inventors: Karen K. Gleason, Rong Yang, Yaron Segal, Tonio Buonassisi, Baby Reeja Jayan
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Publication number: 20130288463Abstract: Method for making thin crystalline or polycrystalline layers. The method includes electrochemically etching a crystalline silicon template to form a porous double layer thereon, the double layer including a highly porous deeper layer and a less porous shallower layer. The shallower layer is irradiated with a short laser pulse selected to recrystallize the shallower layer resulting in a crystalline layer. Silicon is deposited on the recrystallized shallower layer and the silicon is irradiated with a short laser pulse selected to crystalize the silicon leaving a layer of crystallized silicon on the template. Thereafter, the layer of crystallized silicon is separated from the template. The process of the invention can be used to make optoelectronic devices.Type: ApplicationFiled: October 25, 2012Publication date: October 31, 2013Inventors: Mark T. Winkler, Tonio Buonassisi, Riley E. Brandt, Michael J. Aziz, Austin Joseph Akey
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Publication number: 20090184382Abstract: A crystalline material structure is provided. The crystalline material structure includes a semiconductor structure being annealed at temperatures above the brittle-to-ductile transition temperature of the semiconductor structure, and cooled in an approximately linear time-temperature profile down to approximately its respective transition temperature T0.Type: ApplicationFiled: January 23, 2009Publication date: July 23, 2009Inventors: Katherine Hartman, James Serdy, Tonio Buonassisi