Abstract: According to an exemplary embodiment, a III-nitride power conversion circuit includes a gate driver having a plurality of cascaded inverters, each of the plurality of cascaded inverters including at least one III-nitride transistor. At least one of the plurality of cascaded inverters has a cutoff switch and a III-nitride depletion mode load where the cutoff switch is configured to disconnect the III-nitride depletion mode load so as to prevent current from flowing from a supply voltage of the at least one of the plurality of cascaded inverters. The cutoff switch of the at least one of the plurality of cascaded inverters can be driven by one of the plurality of cascaded inverters. The III-nitride power conversion circuit can also include an output driver driven by the gate driver where the output driver has a segmented III-nitride transistor. Furthermore, a selector circuit can be configured to selectively disable at least one segment of the segmented III-nitride transistor.

Abstract: A power converter driver that is supplied with two different voltages.

Abstract: A III-Nitride device has a back-gate disposed in a trench and under and in close proximity to the 2 DEG layer and in lateral alignment with the main gate of the device. A laterally disposed trench is also disposed in a trench and under and in close proximity to the drift region between the gate and drain electrodes of the device. The back-gate is connected to the main gate and the field plate is connected to the source electrode. The back-gate can consist of a highly conductive silicon substrate.

Abstract: A III-Nitride device has a back-gate disposed in a trench and under and in close proximity to the 2 DEG layer and in lateral alignment with the main gate of the device. A laterally disposed trench is also disposed in a trench and under and in close proximity to the drift region between the gate and drain electrodes of the device. The back-gate is connected to the main gate and the field plate is connected to the source electrode. The back-gate can consist of a highly conductive silicon substrate.

Abstract: A power converter driver that is supplied with two different voltages.

Abstract: According to one exemplary embodiment, an efficient and high speed E-mode N/Schottky switch includes a silicon transistor coupled with a D-mode III-nitride device, where the silicon transistor causes the D-mode III-nitride device to operate in an enhancement mode. The E-mode III-N/Schottky switch further includes a Schottky diode coupled across the silicon transistor so as to improve efficiency, recovery time, and speed of the E-mode III-N/Schottky switch. An anode of the Schottky diode can be coupled to a source of the silicon transistor and a cathode of the Schottky diode can he coupled to a drain of the silicon transistor. The Schottky diode can be integrated with the silicon transistor. In one embodiment the III-nitride device is a GaN device.

Abstract: According to an exemplary embodiment, a III-nitride power conversion circuit includes a gate driver having a plurality of cascaded inverters, each of the plurality of cascaded inverters including at least one III-nitride transistor. At least one of the plurality of cascaded inverters has a cutoff switch and a III-nitride depletion mode load where the cutoff switch is configured to disconnect the III-nitride depletion mode load so as to prevent current from flowing from a supply voltage of the at least one of the plurality of cascaded inverters. The cutoff switch of the at least one of the plurality of cascaded inverters can be driven by one of the plurality of cascaded inverters. The III-nitride power conversion circuit can also include an output driver driven by the gate driver where the output driver has a segmented III-nitride transistor. Furthermore, a selector circuit can be configured to selectively disable at least one segment of the segmented III-nitride transistor.

Abstract: According to an exemplary embodiment, a III-nitride power conversion circuit includes a gate driver having a plurality of cascaded inverters, each of the plurality of cascaded inverters including at least one III-nitride transistor. At least one of the plurality of cascaded inverters has a cutoff switch and a III-nitride depletion mode load where the cutoff switch is configured to disconnect the III-nitride depletion mode load so as to prevent current from flowing from a supply voltage of the at least one of the plurality of cascaded inverters. The cutoff switch of the at least one of the plurality of cascaded inverters can be driven by one of the plurality of cascaded inverters. The III-nitride power conversion circuit can also include an output driver driven by the gate driver where the output driver has a segmented III-nitride transistor. Furthermore, a selector circuit can be configured to selectively disable at least one segment of the segmented III-nitride transistor.

Abstract: An integrated circuit that includes a power stage and a driver stage, all stages using III-nitride power devices.

Abstract: An enhancement mode III-Nitride device has a floating gate spaced from a drain electrode which is programmed by charges injected into the floating gate to form a permanent depletion region which interrupts the 2-DEG layer beneath the floating gate. A conventional gate is formed atop the floating gate and is insulated therefrom by a further dielectric layer. The device is a normally off E mode device and is turned on by applying a positive voltage to the floating gate to modify the depletion layer and reinstate the 2-DEG layer. The device is formed by conventional semiconductor fabrication techniques.

Abstract: An interposer electrical interface for placing a DC-DC converter in close proximity with an IC powered by the converter, the DC-DC converter including at least one switching node power supply stage, the at least one switching node power supply stage providing regulated power to the IC, the close proximity of the DC-DC converter and IC allowing for high efficiency in provision of the regulated power from the DC-DC converter to the IC, the interposer electrical interface comprising at least one electrical energy storage element.

Abstract: An integrated circuit that includes a power stage and a driver stage, all stages using III-nitride power devices.

Abstract: One disclosed embodiment is a power conversion circuit including a power conversion bridge between a bus voltage and ground, including a switched node for supplying current to an output circuit. A driver section is configured to drive the power conversion bridge that includes a first section and a second section, the first section being between a negative supply voltage and ground, and the second section being between the switched node and a derived voltage below the switched node, the derived voltage being derived from the negative voltage. In one embodiment, the power conversion bridge includes a high side III-nitride switch and a low side III-nitride switch connected with the high side III-nitride switch to from a half-bridge. In one embodiment, the high side and low side III-nitride switches are depletion mode devices.

Abstract: According to an exemplary embodiment, a III-nitride power conversion circuit includes a gate driver having a plurality of cascaded inverters, each of the plurality of cascaded inverters including at least one III-nitride transistor. At least one of the plurality of cascaded inverters has a cutoff switch and a III-nitride depletion mode load where the cutoff switch is configured to disconnect the III-nitride depletion mode load so as to prevent current from flowing from a supply voltage of the at least one of the plurality of cascaded inverters. The cutoff switch of the at least one of the plurality of cascaded inverters can be driven by one of the plurality of cascaded inverters. The III-nitride power conversion circuit can also include an output driver driven by the gate driver where the output driver has a segmented III-nitride transistor. Furthermore, a selector circuit can be configured to selectively disable at least one segment of the segmented III-nitride transistor.

Abstract: A III-Nitride device has a back-gate disposed in a trench and under and in close proximity to the 2 DEG layer and in lateral alignment with the main gate of the device. A laterally disposed trench is also disposed in a trench and under and in close proximity to the drift region between the gate and drain electrodes of the device. The back-gate is connected to the main gate and the field plate is connected to the source electrode. The back-gate can consist of a highly conductive silicon substrate.

Abstract: An enhancement mode III-Nitride device has a floating gate spaced from a drain electrode which is programmed by charges injected into the floating gate to form a permanent depletion region which interrupts the 2-DEG layer beneath the floating gate. A conventional gate is formed atop the floating gate and is insulated therefrom by a further dielectric layer. The device is a normally off E mode device and is turned on by applying a positive voltage to the floating gate to modify the depletion layer and reinstate the 2-DEG layer. The device is formed by conventional semiconductor fabrication techniques.

Abstract: According to one exemplary embodiment, an efficient and high speed E-mode III-N/Schottky switch includes a silicon transistor coupled with a D-mode III-nitride device, where the silicon transistor causes the D-mode III-nitride device to operate in an enhancement mode. The E-mode III-N/Schottky switch further includes a Schottky diode coupled across the silicon transistor so as to improve efficiency, recovery time, and speed of the E-mode III-N/Schottky switch. An anode of the Schottky diode can be coupled to a source of the silicon transistor and a cathode of the Schottky diode can be coupled to a drain of the silicon transistor. The Schottky diode can be integrated with the silicon transistor. In one embodiment the III-nitride device is a GaN device.

Abstract: An integrated circuit that includes a power stage and a driver stage, all stages using III-nitride power devices.

Abstract: An interposer electrical interface for placing a DC-DC converter in close proximity with an IC powered by the converter, the DC-DC converter including at least one switching node power supply stage, the at least one switching node power supply stage providing regulated power to the IC, the close proximity of the DC-DC converter and IC allowing for high efficiency in provision of the regulated power from the DC-DC converter to the IC, the interposer electrical interface comprising at least one electrical energy storage element.

Abstract: A model for noise coupling in copackaged semiconductor devices due to coupling through parasitic impedances, and a method and decoupling circuit to minimize the effects of such noise. In one example, which is not intended to be limiting either as to the application of the invention or its implementation, a decoupling circuit for a power factor correction IC co-packaged with a power transistor such as an IGBT or MOSFET includes a first branch formed by a capacitor and a parallel branch formed by a resistor and a capacitor in series. The circuit, which is part of the IC, is connected between a power supply node and the circuit ground and, at frequencies associated with the noise, exhibits low impedance to the ground, and a high impedance to the IC and the transistor.