Patents by Inventor Tony Devadason Titus

Tony Devadason Titus has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12206600
    Abstract: Port parameters corresponding to a port of a network switching unit are received at one or more processing chips in the network switching unit. Both (i) serializer/deserializer (SerDes) parameters corresponding to the port, and (ii) transceiver parameters corresponding to the port, are obtained from a local storage based on the port parameters by the one or more processing chips. Signal processing operations of a SerDes unit are configured by the one or more processing chips using the SerDes parameters. The transceiver parameters are provided to a local platform of the network switching unit, for configuration, using the transceiver parameters, of a transceiver communicatively coupled to the port. The signal processing operations are performed by the SerDes unit, according to the SerDes parameters, on a signal received at the SerDes unit from the transceiver or on a signal transmitted from the SerDes unit to the transceiver.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: January 21, 2025
    Assignee: Marvell Asia Pte Ltd
    Inventors: Tony Devadason Titus, Vijay Vyas Mohan, Sen Narayanan Dharmadas, Chaitanya Tikku
  • Patent number: 10824457
    Abstract: Systems, methods, apparatus, and a computer-readable medium are described for generating and receiving information regarding the current state of the active virtual machine in the host and switching the standby virtual machine from standby to active in response to determining that the current active virtual machine may no longer be able to service network packets.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: November 3, 2020
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Tony Devadason Titus, Samir Bhattacharya
  • Patent number: 10797999
    Abstract: Provided are systems, methods, and computer-readable medium for enabling sharing of a multi-channel packet processor by multiple processes executing on a network device. The network device can include a memory management unit, configured to include an address map. The address map can include a reserved portion. The virtual machine can allocate a guest portion in the address map, where the guest portion is allocated in a part of the address map that does not include the reserved portion. A first channel from the packet processor can be assigned to the guest portion, and the virtual machine can use the first channel to receive packets. The reserved portion can be assigned to a host process executing on the network device. A second channel from the packet processor can be assigned to the reserved portion. The host process can transmit packets to the network using the second channel.
    Type: Grant
    Filed: August 13, 2019
    Date of Patent: October 6, 2020
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Changbai He, Rajib Dutta, Michael Li, Samir Bhattacharya, Tony Devadason Titus
  • Patent number: 10419344
    Abstract: Provided are systems, methods, and computer-readable medium for enabling sharing of a multi-channel packet processor by multiple processes executing on a network device. The network device can include a memory management unit, configured to include an address map. The address map can include a reserved portion. The virtual machine can allocate a guest portion in the address map, where the guest portion is allocated in a part of the address map that does not include the reserved portion. A first channel from the packet processor can be assigned to the guest portion, and the virtual machine can use the first channel to receive packets. The reserved portion can be assigned to a host process executing on the network device. A second channel from the packet processor can be assigned to the reserved portion. The host process can transmit packets to the network using the second channel.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: September 17, 2019
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Changbai He, Rajib Dutta, Michael Li, Samir Bhattacharya, Tony Devadason Titus
  • Publication number: 20180225140
    Abstract: Systems, methods, apparatus, and a computer-readable medium are described for generating and receiving information regarding the current state of the active virtual machine in the host and switching the standby virtual machine from standby to active in response to determining that the current active virtual machine may no longer be able to service network packets.
    Type: Application
    Filed: March 30, 2018
    Publication date: August 9, 2018
    Applicant: Brocade Communications Systems LLC
    Inventors: Tony Devadason Titus, Samir Bhattacharya
  • Publication number: 20180225162
    Abstract: Systems, methods, apparatus, and computer-readable medium are described for executing a foreground bound process with characteristics similar to a background process. In certain implementations, a code wrapper is executed before and/or after the foreground bound process is invoked that dissociates the process input/output with the standard input/output provided by the operating system and redirects the input/output such that the foreground process no longer blocks the input/output and another process can interact with the foreground bound process.
    Type: Application
    Filed: March 30, 2018
    Publication date: August 9, 2018
    Applicant: Brocade Communications Systems LLC
    Inventors: Rajib Dutta, Tony Devadason Titus
  • Publication number: 20180219777
    Abstract: Provided are systems, methods, and computer-readable medium for enabling sharing of a multi-channel packet processor by multiple processes executing on a network device. The network device can include a memory management unit, configured to include an address map. The address map can include a reserved portion. The virtual machine can allocate a guest portion in the address map, where the guest portion is allocated in a part of the address map that does not include the reserved portion. A first channel from the packet processor can be assigned to the guest portion, and the virtual machine can use the first channel to receive packets. The reserved portion can be assigned to a host process executing on the network device. A second channel from the packet processor can be assigned to the reserved portion. The host process can transmit packets to the network using the second channel.
    Type: Application
    Filed: March 28, 2018
    Publication date: August 2, 2018
    Applicant: Brocade Communications Systems LLC
    Inventors: Changbai He, Rajib Dutta, Michael Li, Samir Bhattacharya, Tony Devadason Titus