Abstract: For the present invention, multiple MEMS switches that are similar in nature are provided along with switch control circuitry. Of the MEMS switches, one MEMS switch is reserved as a dummy MEMS switch while the one or more remaining MEMS switches are active, and are thus used during normal operation of the electronic circuitry that incorporates the MEMS switches. The switch control circuitry will use the dummy MEMS switch to adaptively determine an actuation signal that is sufficient to effect a near closing or soft closing of the dummy MEMS switch. The switch control circuitry may also determine a closing time that defines a time when the dummy MEMS switch closes relative to application of the actuation signal. The actuation signal and closing time may be updated regularly, if not continuously.

Abstract: The present invention relates to using an insulator layer between two metal layers of a semiconductor die to provide a micro-electromechanical systems (MEMS) device, such as an ohmic MEMS switch or a capacitive MEMS switch. In an ohmic MEMS switch, the insulator layer may be used to reduce metal undercutting during fabrication, to prevent electrical shorting of a MEMS actuator to a MEMS cantilever, or both. In a capacitive MEMS switch, the insulator layer may be used as a capacitive dielectric between capacitive plates, which are provided by the two metal layers. A fixed capacitive element may be provided by the insulator layer between the two metal layers. In one embodiment of the present invention, an ohmic MEMS switch, a capacitive MEMS switch, a fixed capacitive element, or any combination thereof may be integrated into a single semiconductor die.

Abstract: The present invention relates to using an insulator layer between two metal layers of a semiconductor die to provide a micro-electromechanical systems (MEMS) device, such as an ohmic MEMS switch or a capacitive MEMS switch. In an ohmic MEMS switch, the insulator layer may be used to reduce metal undercutting during fabrication, to prevent electrical shorting of a MEMS actuator to a MEMS cantilever, or both. In a capacitive MEMS switch, the insulator layer may be used as a capacitive dielectric between capacitive plates, which are provided by the two metal layers. A fixed capacitive element may be provided by the insulator layer between the two metal layers. In one embodiment of the present invention, an ohmic MEMS switch, a capacitive MEMS switch, a fixed capacitive element, or any combination thereof may be integrated into a single semiconductor die.

Abstract: The present invention relates to providing a uniform operating environment for each of multiple devices by providing a common environment to the devices. The common environment is provided by multiple cavities, which are interconnected by at least one environmental pathway, which may be provided by at least one tunnel. The common environment may help provide uniform operating pressure, which may be a partial or near vacuum, a surrounding gas of uniform contents, such as an inert gas or mixture of inert gases, or both. The devices may include micro-electro-mechanical system (MEMS) devices, such as MEMS switches.

Abstract: The present invention provides a method for manufacturing a micro-electro-mechanical system (MEMS) resonator device using the same device layer, dielectric layer, and conductive layer that is used to create other electrical devices in a complementary metal oxide semiconductor (CMOS) process.

Abstract: The present invention relates to using an insulator layer between two metal layers of a semiconductor die to provide a micro-electromechanicalsystems (MEMS) device, such as an ohmic MEMS switch or a capacitive MEMS switch. In an ohmic MEMS switch, the insulator layer may be used to reduce metal undercutting during fabrication, to prevent electrical shorting of a MEMS actuator to a MEMS cantilever, or both. In a capacitive MEMS switch, the insulator layer may be used as a capacitive dielectric between capacitive plates, which are provided by the two metal layers. A fixed capacitive element may be provided by the insulator layer between the two metal layers. In one embodiment of the present invention, an ohmic MEMS switch, a capacitive MEMS switch, a fixed capacitive element, or any combination thereof may be integrated into a single semiconductor die.

Abstract: The present invention provides a method for manufacturing a micro-electro-mechanical system (MEMS) resonator device using the same device layer, dielectric layer, and conductive layer that is used to create other electrical devices in a complementary metal oxide semiconductor (CMOS) process.

Abstract: The present invention includes a fabrication method to construct a combined MEMS device and IC on a silicon-on-insulator (SOI) wafer (MEMS-IC) using standard foundry IC processing techniques. The invention also includes the resulting MEMS-IC. Deposition layers are added to the SOI wafer and etched away to form interconnects for electronic components for the IC. In one embodiment of the present invention, standard foundry IC processing etching techniques may be used to etch away parts of the insulating layer and device layer of the SOI wafer to create fine gaps and other detailed mechanical features of the MEMS device. Finely detailed etching patterns may be added by using imprint lithography instead of using contact or optical lithography.

Abstract: The present invention includes a silicon-on-insulator (SOI) wafer that enhances certain performance parameters by increasing silicon device layer and insulator layer thicknesses and increasing silicon handle wafer resistivity. By increasing the silicon device layer thickness, effects of the floating body problem may be significantly reduced. By increasing the insulator layer thickness and the silicon handle wafer resistivity, influences from the silicon handle wafer on devices formed using the silicon device layer may be significantly reduced. As a result, standard tools, methods, and processes may be used.

Abstract: The present invention provides a MEMS switch that is formed on, not merely placed on, a semiconductor substrate of a semiconductor device. The basic semiconductor substrate includes a handle wafer, an insulator layer over the handle wafer, and a device layer over the insulator layer. The device layer is one in which active semiconductor devices, such as transistors and diodes, may be formed. The MEMS switch is formed over the device layer during fabrication of the semiconductor device. Additional layers, such as connecting layers, passivation layers, and dielectric layers, may be inserted among or between any of these various layers without departing from the essence of the invention. As such, the present invention avoids the need to fabricate MEMS switches apart from the devices that contain circuitry to be associated with the MEMS switches, and to subsequently mount the MEMS switches to modules that circuitry.

Abstract: The present invention relates to a semiconductor device having an integrated metal shield. The shield, created as part of a MOSFET, is formed about a gate electrode of the MOSFET to effectively reduce drain-to-gate capacitance and increase breakdown voltage. The shield consists of a metallic shield contact via and a source contact extension. The metallic shield contact via, formed between the gate electrode and a drain region of the MOSFET, may be either a series of closely spaced vias or a wide continuous via. The metallic shield contact via is isolated from the surface of a semiconductor wafer by a shield isolation layer at one end. The metallic shield contact via is electrically coupled to the source contact extension at the other end. The source contact extension is metallic, and may be formed from the same metal used to create a source contact and a drain contact for the MOSFET.

Abstract: A flip chip power device having an integrated low inductance ground and heat sink path and an isolation structure is provided. A substrate is formed having transistors and an ohmic contact region circumscribing the transistors. Dielectric layers are formed on the substrate, and a common metal layer is formed on the dielectric layers. An isolation metal layer is formed on the dielectric layers above the ohmic contact region. The common metal layer is coupled to a first region of each of the transistors, and the isolation metal layer is coupled to the ohmic contact region. A first bump is formed on the common metal layer, and a second bump is formed on the isolation metal layer. When the power device is attached to a second substrate, the first bump forms a low inductance ground and heat sink path to the second substrate, and an isolation structure is formed.