Patents by Inventor Tony Low

Tony Low has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11885985
    Abstract: The subject matter of this specification can be embodied in, among other things, a graphene plasmon resonator that includes a planar patterned layer having a collection of electrically conductive segments, and a collection of dielectric segments, each dielectric segment defined between a corresponding pair of the electrically conductive segments, a graphene layer substantially parallel to the planar patterned layer and overlapping the collection of electrically conductive segments, and a planar dielectric layer between the planar patterned layer and the graphene layer.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: January 30, 2024
    Assignee: Regents of the University of Minnesota
    Inventors: Sang-Hyun Oh, In-Ho Lee, Tony Low
  • Publication number: 20230413692
    Abstract: Disclosed are energy efficient ferroelectric devices and methods for making such devices. For example, a ferroelectric device may be a ferroelectric tunneling junction device that includes a graphene layer on a substrate. A tunneling layer may be disposed on a portion of the graphene layer. The tunneling layer may be a ferroelectric material. A metal electrical contact layer may be disposed over the tunneling layer and the graphene layer. Additionally, some embodiments may have an additional monolayer disposed between the tunneling layer and graphene layer. By specific engineering of such layers, tunneling electroresistance performance may be substantially improved.
    Type: Application
    Filed: June 20, 2023
    Publication date: December 21, 2023
    Inventors: Cheng GONG, Tony LOW, Jian-Ping WANG
  • Patent number: 11552242
    Abstract: In some examples, a device includes a magnetic tunnel junction including a first Weyl semimetal layer, a second Weyl semimetal layer, and a dielectric layer positioned between the first and second Weyl semimetal layers. The magnetic tunnel junction may have a large tunnel magnetoresistance ratio, which may be greater than five hundred percent or even greater than one thousand percent.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: January 10, 2023
    Assignee: Regents of the University of Minnesota
    Inventors: Duarte José Pereira de Sousa, Cesar Octavio Ascencio, Jian-Ping Wang, Tony Low
  • Publication number: 20220328757
    Abstract: In some examples, a device includes a magnetic tunnel junction including a first Weyl semimetal layer, a second Weyl semimetal layer, and a dielectric layer positioned between the first and second Weyl semimetal layers. The magnetic tunnel junction may have a large tunnel magnetoresistance ratio, which may be greater than five hundred percent or even greater than one thousand percent.
    Type: Application
    Filed: April 8, 2021
    Publication date: October 13, 2022
    Inventors: Duarte José Pereira de Sousa, Cesar Octavio Ascencio, Jian-Ping Wang, Tony Low
  • Publication number: 20200387044
    Abstract: The subject matter of this specification can be embodied in, among other things, a graphene plasmon resonator that includes a planar patterned layer having a collection of electrically conductive segments, and a collection of dielectric segments, each dielectric segment defined between a corresponding pair of the electrically conductive segments, a graphene layer substantially parallel to the planar patterned layer and overlapping the collection of electrically conductive segments, and a planar dielectric layer between the planar patterned layer and the graphene layer.
    Type: Application
    Filed: June 5, 2020
    Publication date: December 10, 2020
    Inventors: Sang-Hyun Oh, In-Ho Lee, Tony Low
  • Patent number: 8987740
    Abstract: A set of buried electrodes are embedded in a dielectric material layer, and a graphene layer having a doping of a first conductivity type are formed thereupon. A first upper electrode is formed over a center portion of each buried electrode. Second upper electrodes are formed in regions that do not overlie the buried electrodes. A bias voltage is applied to the set of buried electrodes to form a charged region including minority charge carriers over each of the buried electrodes, and to form a p-n junction around each portion of the graphene layer overlying a buried electrode. Charge carriers generated at the p-n junctions are collected by the first upper electrodes and the second upper electrodes, and are subsequently measured by a current measurement device or a voltage measurement device.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: March 24, 2015
    Assignee: International Business Machines Corporation
    Inventors: Phaedon Avouris, Tony A. Low, Fengnian Xia
  • Patent number: 8901689
    Abstract: A set of buried electrodes are embedded in a dielectric material layer, and a graphene layer having a doping of a first conductivity type are formed thereupon. A first upper electrode is formed over a center portion of each buried electrode. Second upper electrodes are formed in regions that do not overlie the buried electrodes. A bias voltage is applied to the set of buried electrodes to form a charged region including minority charge carriers over each of the buried electrodes, and to form a p-n junction around each portion of the graphene layer overlying a buried electrode. Charge carriers generated at the p-n junctions are collected by the first upper electrodes and the second upper electrodes, and are subsequently measured by a current measurement device or a voltage measurement device.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: December 2, 2014
    Assignee: International Business Machines Corporation
    Inventors: Phaedon Avouris, Tony A. Low, Fengnian Xia
  • Publication number: 20140332757
    Abstract: A set of buried electrodes are embedded in a dielectric material layer, and a graphene layer having a doping of a first conductivity type are formed thereupon. A first upper electrode is formed over a center portion of each buried electrode. Second upper electrodes are formed in regions that do not overlie the buried electrodes. A bias voltage is applied to the set of buried electrodes to form a charged region including minority charge carriers over each of the buried electrodes, and to form a p-n junction around each portion of the graphene layer overlying a buried electrode. Charge carriers generated at the p-n junctions are collected by the first upper electrodes and the second upper electrodes, and are subsequently measured by a current measurement device or a voltage measurement device.
    Type: Application
    Filed: May 10, 2013
    Publication date: November 13, 2014
    Applicant: International Business Machines Corporation
    Inventors: Phaedon Avouris, Tony A. Low, Fengnian Xia
  • Publication number: 20140335650
    Abstract: A set of buried electrodes are embedded in a dielectric material layer, and a graphene layer having a doping of a first conductivity type are formed thereupon. A first upper electrode is formed over a center portion of each buried electrode. Second upper electrodes are formed in regions that do not overlie the buried electrodes. A bias voltage is applied to the set of buried electrodes to form a charged region including minority charge carriers over each of the buried electrodes, and to form a p-n junction around each portion of the graphene layer overlying a buried electrode. Charge carriers generated at the p-n junctions are collected by the first upper electrodes and the second upper electrodes, and are subsequently measured by a current measurement device or a voltage measurement device.
    Type: Application
    Filed: September 16, 2013
    Publication date: November 13, 2014
    Applicant: International Business Machines Corporation
    Inventors: Phaedon Avouris, Tony A. Low, Fengnian Xia
  • Patent number: 8145777
    Abstract: A foreground protocol engine receives a request for rendering the contents of a packet in a recording of a protocol data stream, the protocol data stream comprising a plurality of packets. The foreground protocol engine identifies a state-snapshot having an associated timestamp previous to that of the requested packet. The foreground protocol engine displays the requested packet responsive to the identified state-snapshot.
    Type: Grant
    Filed: January 14, 2005
    Date of Patent: March 27, 2012
    Assignee: Citrix Systems, Inc.
    Inventors: Paul Ryman, Richard Croft, Tony Low
  • Publication number: 20060161959
    Abstract: A foreground protocol engine receives a request for rendering the contents of a packet in a recording of a protocol data stream, the protocol data stream comprising a plurality of packets. The foreground protocol engine identifies a state-snapshot having an associated timestamp previous to that of the requested packet. The foreground protocol engine displays the requested packet responsive to the identified state-snapshot.
    Type: Application
    Filed: January 14, 2005
    Publication date: July 20, 2006
    Applicant: Citrix Systems, Inc.
    Inventors: Paul Ryman, Richard Croft, Tony Low
  • Publication number: 20060161671
    Abstract: A recorder intercepts a protocol data stream comprising a plurality of packets, sent from a first device to a second device, the protocol data stream representing display data. The recorder copies at least one packet of the protocol data stream. The recorder creates a recording of the protocol data stream using the at least one copied packet. A protocol engine reads the at least one copied packet from the recording of the protocol data stream. The protocol engine uses information associated with the at least one copied packet to regenerate the display data represented by the protocol data stream.
    Type: Application
    Filed: January 14, 2005
    Publication date: July 20, 2006
    Applicant: Citrix Systems, Inc.
    Inventors: Paul Ryman, Richard Croft, Tony Low