Abstract: A method for testing a data recovery circuit (DRC) includes disturbing a running variable in a closed control loop of the DRC, as the DRC is processing a received test signal. Data recovered by the DRC, while the DRC was affected by the disturbance, is evaluated.

Abstract: Embodiments of the invention relate to techniques for automatic degradation testing of a high-speed serial receiver. A transmitter manipulator couples to a transmitter of a serial interface circuit. The transmitter is coupled to the receiver of the serial interface circuit. The transmitter manipulator includes a storage to store one of current compensation values or impedance compensation values and sequencing logic to dynamically sequence the one of the current compensation values or impedance compensation values to the transmitter. The transmitter responsive to the dynamically sequenced one of the current or impedance compensation values generates a degraded test pattern signal to transmit to the receiver in order to test the receiver.

Abstract: A method and an apparatus for transmit phase select are disclosed. In one embodiment, the method includes selecting one or more phases out of a set of phases of a clock, transmitting a data pattern in each of the selected phases, and receiving the loop-back data pattern. The techniques described herein can be used in screening out defective high-speed serial interface as well as design validation of the interface.

Abstract: Embodiments of the invention relate to techniques for automatic degradation testing of a high-speed serial receiver. A transmitter manipulator couples to a transmitter of a serial interface circuit. The transmitter is coupled to the receiver of the serial interface circuit. The transmitter manipulator includes a storage to store one of current compensation values or impedance compensation values and sequencing logic to dynamically sequence the one of the current compensation values or impedance compensation values to the transmitter. The transmitter responsive to the dynamically sequenced one of the current or impedance compensation values generates a degraded test pattern signal to transmit to the receiver in order to test the receiver.

Abstract: A method and apparatus for transferring data from a first bus to a second bus. A bridge couples a first bus to a second bus. The bridge includes a buffer to store two data elements of a first packet transferred to the buffer from the first bus. The bridge also includes a controller that permits a first data element to be transferred from the buffer to the second bus. In addition, if at least a portion of a second packet has not been transferred to the bridge from the first bus, then the controller causes at least one wait state to be inserted on the second bus before transferring the second data element of the first packet from the buffer to the second bus.