Abstract: A method for a system includes applying power to a MEMS device while inhibiting applying power to a processor, thereafter determining first sensed data with the MEMS device in response to first event data, when the first sensed data exceeds a first threshold, determining second sensed data with a second MEMS device in response to second event data, when the second sensed data exceeds a second threshold, applying power to the processor, determining with the processor whether a seismic event is occurring in response to the first and the second sensed data, directing with the processor, an electronically-controllable mechanism to shut-off a utility supply, in response to the seismic event being determined.

Abstract: A method for a MEMS device comprises determining in a computer system, a first driving signal for the MEMS device in response to a first time delay and to a base driving signal, applying the first driving signal to the MEMS device to induce the MEMS device to operate at a first frequency, determining a second driving signal for the MEMS device in response to a second time delay and to the base driving signal, applying the second driving signal to the MEMS device to induce the MEMS device to operate at a second frequency, determining a first quality factor associated with the MEMS device in response to the first frequency and the second frequency, determining a quality factor associated with the MEMS device in response to the first quality factor, and determining whether the quality factor associated with the MEMS device, exceeds a threshold quality factor.

Abstract: A method is provided for implementing a security mechanism in an integrated MEMS (Micro-Electro-Mechanical-System) device having a MEMS sensor with an output register associated with a sensing operation, the integrated MEMS device being electrically coupled to a computing system programmed to perform the method. The method includes, in normal operation, reading from the output register an output of the sensing operation, and in a test mode, determining, by a processor disposed within the computing system, a random value. Determining the random value can include reading from the output register, which in the test mode or provides a value from an internal pattern generator. The method also includes determining, by the processor, a validation value, reading, by the processor, the random value stored in the output register; and determining, by the processor, whether the integrated device is valid using the validation value and the random value stored in the output register.

Abstract: A method is provided for implementing a security mechanism in an integrated MEMS (Micro-Electro-Mechanical-System) device having a MEMS sensor with an output register associated with a sensing operation, the integrated MEMS device being electrically coupled to a computing system programmed to perform the method. The method includes, in normal operation, reading from the output register an output of the sensing operation, and in a test mode, determining, by a processor disposed within the computing system, a random value. Determining the random value can include reading from the output register, which in the test mode or provides a value from an internal pattern generator. The method also includes determining, by the processor, a validation value, reading, by the processor, the random value stored in the output register; and determining, by the processor, whether the integrated device is valid using the validation value and the random value stored in the output register.

Abstract: Systems and methods for implementing security mechanisms in integrated devices and related structures. This method can include validating a device ID, generating a random value based on selected seed parameters, performing logic operations from hardware using the random value, and validating the integrated device based on logic operations from software using the random value. The system can include executable instructions for performing the method in a computing system. Various embodiments of the present invention represent several implementations of a security mechanism for integrated devices. These implementations provide several levels of encryption or protection of integrated devices, which can be tailored depending on the hardware and/or software requirements of specific applications.