Abstract: An embodiment of the present invention is a technique to fabricate a cover assembly. A cover has a base plate and sidewalls attached to perimeter of the base plate. The sidewalls have a height. A plurality of devices is attached to underside of the base plate. The devices have length corresponding to the height such that the devices are sealed within the cover when the cover is attached to a surface.

Abstract: An apparatus and method to provide a via with an increased via contact area. A semiconductor support layer is coupled to a dielectric layer and a contact is coupled to the dielectric layer. A via, having an enlarged end within the semiconductor support layer, passes through the semiconductor support layer and the dielectric layer and connects to the contact. In one embodiment, the formation of the via and the enlarged end in the semiconductor support layer are completed in a single dry etch process.