Patents by Inventor Tony Pahlsson

Tony Pahlsson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190131978
    Abstract: A phase locked loop, for a particularly in a beamforming system comprises a digital loop filter to provide a digital control word to a controllable oscillator; a frequency divider configured to provide a first feedback signal and a second feedback signal in response to an oscillator signal, the second feedback signal delayed with respect to the first feedback signal; a first comparator path configured to receive the first feedback signal and a second comparator path configured to receive the second feedback signal, each of the first and second comparator path configured to provide a respective phase delay signal to the digital loop filter in response to a respective adjustment signal and a phase deviation between a common reference signal and the respective feedback signal.
    Type: Application
    Filed: April 8, 2016
    Publication date: May 2, 2019
    Inventors: Henrik Sjoland, Tony Pahlsson
  • Patent number: 10224940
    Abstract: A digital solution for phase control of an output of a phase-locked loop (PLL) (100) is provided to achieve a desired phase shift at the output of the PLL (100). To that end, a fraction of the pulses of a PLL feedback signal are time shifted to achieve a desired average time shift associated with the desired phase shift. As a result, a desired phase shift is generated at the output of the PLL (100), while a desired devisor of the feedback signal is maintained on average. The resulting digital solution provides highly accurate phase control.
    Type: Grant
    Filed: April 27, 2015
    Date of Patent: March 5, 2019
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
    Inventors: Henrik Sjöland, Staffan Ek, Tony Påhlsson
  • Publication number: 20180367153
    Abstract: Exemplary embodiments include an electronic frequency-divider circuit comprising a multi-phase generator circuit configured to: receive an oscillating input signal having a frequency f; determine an integer divide ratio Q based on a first control signal input; and based on the oscillating input signal, generate an N-phase output signal having a frequency f-divided-by-M, wherein M is an integer and adjacent phases of the N-phase output signal are separated by 360-divided-by-(M-times-Q) degrees. The divider circuit can also include a control circuit configured to receive a control input and, based on the control input: provide the first control signal to the multi-phase generator circuit; and select a particular phase of the N-phase output signal. Exemplary embodiments also include a phase-locked loop circuits, transceiver circuits, radio stations, and methods of frequency-dividing an oscillating signal.
    Type: Application
    Filed: August 27, 2018
    Publication date: December 20, 2018
    Inventors: Staffan Ek, Tony Påhlsson, Henrik Sjöland
  • Patent number: 10110238
    Abstract: An electronic circuit arranged to receive an oscillating signal and output an output signal at a frequency having a frequency relation with the oscillating signal defined by a divide ratio is provided.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: October 23, 2018
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Staffan Ek, Tony Påhlsson, Henrik Sjöland
  • Patent number: 10103738
    Abstract: A quadrature phase detector circuit for a multi-antenna radio circuit comprising a plurality of frequency synthesizers using a common reference oscillator signal is disclosed.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: October 16, 2018
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
    Inventors: Staffan Ek, Sven Mattisson, Tony Påhlsson, Henrik Sjöland
  • Publication number: 20180226977
    Abstract: A quadrature phase detector circuit for a multi-antenna radio circuit comprising a plurality of frequency synthesizers using a common reference oscillator signal is disclosed.
    Type: Application
    Filed: June 16, 2015
    Publication date: August 9, 2018
    Applicant: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Staffan Ek, Sven Mattisson, Tony Påhlsson, Henrik Sjöland
  • Publication number: 20180198454
    Abstract: A digital solution for phase control of an output of a phase-locked loop (PLL) (100) is provided to achieve a desired phase shift at the output of the PLL (100). To that end, a fraction of the pulses of a PLL feedback signal are time shifted to achieve a desired average time shift associated with the desired phase shift. As a result, a desired phase shift is generated at the output of the PLL (100), while a desired devisor of the feedback signal is maintained on average. The resulting digital solution provides highly accurate phase control.
    Type: Application
    Filed: April 27, 2015
    Publication date: July 12, 2018
    Inventors: Henrik Sjöland, Staffan Ek, Tony Påhlsson
  • Patent number: 10003346
    Abstract: The programmable frequency control system presented herein provides frequency programmability and phase noise reduction for signals generated by a plurality of frequency programmable phase-locked loops (PLLs). In general, a modulated data stream input to each of the plurality of PLLs controls the frequency of the signal output by the PLLs. The solution presented herein reduces the phase noise by introducing a time shift to the modulated data stream applied to at least some of the PLLs so that at least some of the PLLs receive time-shifted versions of the modulated data stream relative to other PLLs. In so doing, the solution presented herein decorrelates the quantization noise generated by the plurality of frequency programmable PLLs.
    Type: Grant
    Filed: March 20, 2015
    Date of Patent: June 19, 2018
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
    Inventors: Henrik Sjöland, Staffan Ek, Tony Påhlsson
  • Publication number: 20180159546
    Abstract: An electronic circuit arranged to receive an oscillating signal and output an output signal at a frequency having a frequency relation with the oscillating signal defined by a divide ratio is provided.
    Type: Application
    Filed: June 16, 2015
    Publication date: June 7, 2018
    Inventors: Staffan Ek, Tony Påhlsson, Henrik Sjöland
  • Publication number: 20180138917
    Abstract: A phase locked loop arrangement (1) beamforming comprises two or more phase locked loops. The loops include a phase comparator (21, 22) and an adjustable charge pump arrangement (31, 32) having a loop filter (51, 52) and charge pump current source (41, 42) with an adjustment input (?adj) connected to the loop filter (51, 52) to inject an adjustable charge pump current into the loop filter. A constant current source (71, 72) is configured to inject a first predetermined charge current into the loop filter (51, 52). The adjustable charge pump arrangements (31, 32) are connected to the respective phase comparators (21, 22) to provide a voltage control signal (vctrl) to an oscillator (61, 62) of the respective phase adjustable phase locked loop (11, 12) in response to the respective control signal (up, down) and to generate a phase deviation between the first and one of the at least one second oscillator signals (fosc1, fosc2) based on an adjustment signal applied to the adjustment input (?adj).
    Type: Application
    Filed: June 11, 2015
    Publication date: May 17, 2018
    Inventors: Tony Påhlsson, Staffan Ek, Henrik Sjöland
  • Publication number: 20180102783
    Abstract: The programmable frequency control system presented herein provides frequency programmability and phase noise reduction for signals generated by a plurality of frequency programmable phase-locked loops (PLLs). In general, a modulated data stream input to each of the plurality of PLLs controls the frequency of the signal output by the PLLs. The solution presented herein reduces the phase noise by introducing a time shift to the modulated data stream applied to at least some of the PLLs so that at least some of the PLLs receive time-shifted versions of the modulated data stream relative to other PLLs. In so doing, the solution presented herein decorrelates the quantization noise generated by the plurality of frequency programmable PLLs.
    Type: Application
    Filed: March 20, 2015
    Publication date: April 12, 2018
    Inventors: Henrik Sjöland, Staffan Ek, Tony Påhlsson
  • Patent number: 9583832
    Abstract: The phase-locked loop (PLL) presented herein controls the phase of the output of the PLL. To that end, the PLL includes an oscillator that generates an output signal at an output of the PLL responsive to a comparison between a reference signal input to the PLL and a feedback signal derived from the output signal. To control the phase of the output signal, a modulation signal is applied to one input of the oscillator, separate from the reference signal input, where the modulation signal comprises one or more pulses having a total area defined based on the desired phase shift. To maintain the desired phase shift at the output of the PLL, the PLL also sets a time relationship between the reference signal and the feedback signal based on the desired phase shift.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: February 28, 2017
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
    Inventors: Staffan Ek, Tony Påhlsson, Henrik Sjöland, Lars Sundström
  • Publication number: 20160240921
    Abstract: The phase-locked loop (PLL) presented herein controls the phase of the output of the PLL. To that end, the PLL includes an oscillator that generates an output signal at an output of the PLL responsive to a comparison between a reference signal input to the PLL and a feedback signal derived from the output signal. To control the phase of the output signal, a modulation signal is applied to one input of the oscillator, separate from the reference signal input, where the modulation signal comprises one or more pulses having a total area defined based on the desired phase shift. To maintain the desired phase shift at the output of the PLL, the PLL also sets a time relationship between the reference signal and the feedback signal based on the desired phase shift.
    Type: Application
    Filed: April 27, 2016
    Publication date: August 18, 2016
    Inventors: Staffan Ek, Tony Påhlsson, Henrik Sjöland, Lars Sundström
  • Publication number: 20160182059
    Abstract: The phase-locked loop (PLL) presented herein controls the phase of the output of the PLL. To that end, the PLL includes an oscillator that generates an output signal at an output of the PLL responsive to a comparison between a reference signal input to the PLL and a feedback signal derived from the output signal. To control the phase of the output signal, a modulation signal is applied to one input of the oscillator, separate from the reference signal input, where the modulation signal comprises one or more pulses having a total area defined based on the desired phase shift. To maintain the desired phase shift at the output of the PLL, the PLL also sets a time relationship between the reference signal and the feedback signal based on the desired phase shift.
    Type: Application
    Filed: December 19, 2014
    Publication date: June 23, 2016
    Inventors: Staffan Ek, Tony Påhlsson, Henrik Sjöland, Lars Sundström
  • Patent number: 9356609
    Abstract: The phase-locked loop (PLL) presented herein controls the phase of the output of the PLL. To that end, the PLL includes an oscillator that generates an output signal at an output of the PLL responsive to a comparison between a reference signal input to the PLL and a feedback signal derived from the output signal. To control the phase of the output signal, a modulation signal is applied to one input of the oscillator, separate from the reference signal input, where the modulation signal comprises one or more pulses having a total area defined based on the desired phase shift. To maintain the desired phase shift at the output of the PLL, the PLL also sets a time relationship between the reference signal and the feedback signal based on the desired phase shift.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: May 31, 2016
    Assignee: TELEFONAKTIEBOLAGET L M ERICSSON (PUBL)
    Inventors: Staffan Ek, Tony Påhlsson, Henrik Sjöland, Lars Sundström