Patents by Inventor Tony QUAGLIETTA

Tony QUAGLIETTA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10008983
    Abstract: Bias circuit for power amplifier. In some embodiments, a bias circuit for an amplifier can include an input node, an output node, a supply voltage node, and a ground node. The bias circuit can further include a first transistor and a second transistor, with each transistor having a base, a collector, and an emitter. The base, collector and emitter of the second transistor can be coupled to the output node, input node and ground node, respectively. The base and collector of the first transistor can be coupled to the input node and supply voltage node, respectively. The bias circuit can further include a voltage adjustment circuit implemented between the emitter of the first transistor and the output node, and be configured to adjust a voltage at the emitter of the first transistor to a voltage at the output node.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: June 26, 2018
    Assignee: Skyworks Solutions, Inc.
    Inventor: Tony Quaglietta
  • Publication number: 20170294881
    Abstract: Bias circuit for power amplifier. In some embodiments, a bias circuit for an amplifier can include an input node, an output node, a supply voltage node, and a ground node. The bias circuit can further include a first transistor and a second transistor, with each transistor having a base, a collector, and an emitter. The base, collector and emitter of the second transistor can be coupled to the output node, input node and ground node, respectively. The base and collector of the first transistor can be coupled to the input node and supply voltage node, respectively. The bias circuit can further include a voltage adjustment circuit implemented between the emitter of the first transistor and the output node, and be configured to adjust a voltage at the emitter of the first transistor to a voltage at the output node.
    Type: Application
    Filed: April 25, 2017
    Publication date: October 12, 2017
    Inventor: Tony QUAGLIETTA
  • Patent number: 9632522
    Abstract: Current mirror bias circuit with voltage adjustment. A biasing system can include an input configured to receive an input current and an output configured to provide an output current. The biasing system can include a first transistor having a first base coupled to the input and a first collector coupled to a supply voltage. The biasing system can further include a second transistor having a second base coupled to the output, a second collector coupled to the input, and a second emitter coupled to a ground voltage. The biasing system can include a voltage adjustment component having a voltage adjustment input coupled to a first emitter of the first transistor and a voltage adjustment output coupled to the output. The voltage adjustment component can be configured to reduce a voltage from the voltage adjustment input to the voltage adjustment output substantially independent of a magnitude of a current through the voltage adjustment component.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: April 25, 2017
    Assignee: Skyworks Solutions, Inc.
    Inventor: Tony Quaglietta
  • Publication number: 20170023968
    Abstract: Current mirror bias circuit with voltage adjustment. A biasing system can include an input configured to receive an input current and an output configured to provide an output current. The biasing system can include a first transistor having a first base coupled to the input and a first collector coupled to a supply voltage. The biasing system can further include a second transistor having a second base coupled to the output, a second collector coupled to the input, and a second emitter coupled to a ground voltage. The biasing system can include a voltage adjustment component having a voltage adjustment input coupled to a first emitter of the first transistor and a voltage adjustment output coupled to the output. The voltage adjustment component can be configured to reduce a voltage from the voltage adjustment input to the voltage adjustment output substantially independent of a magnitude of a current through the voltage adjustment component.
    Type: Application
    Filed: April 11, 2016
    Publication date: January 26, 2017
    Inventor: Tony QUAGLIETTA