Patents by Inventor Tooru Hiyama

Tooru Hiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for optimizing delays in semiconductor circuits
    Patent number: 5544068
    Abstract: A control device and a storage device are provided. The storage device has a clock signal file for determining a delay reference value for a path, and a logic information file for holding description of elements in the path. The control device refers to the clock signal file and the logic information file to determine an combination of the emitter-follower current and the value of the current-switch current of a certain element in the path.
    Type: Grant
    Filed: March 9, 1994
    Date of Patent: August 6, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Misao Takimoto, Tooru Hiyama, Tetsuo Sasaki, Tatsuki Ishii