Patents by Inventor Tooru Mita

Tooru Mita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5059559
    Abstract: The present invention relates to a multi-pin chip mounting method and apparatus based on a TAB (Tape Automated Bonding) system in which leads formed on a tape and bumps formed an IC chip are aligned with each other and compress-bonded to each other. An IC chip having bumps formed on a surface thereof and inner leads formed on a carrier tape are disposed opposite to each other at a bonding station. A position of the IC chip on a stage is detected through the inner leads at the bonding station to determine the amount of correction of position of the stage. The inner leads and the IC chip are aligned with each other on the basis of the determined correction amount and are thereafter bonded to each other.
    Type: Grant
    Filed: November 1, 1988
    Date of Patent: October 22, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Michio Takahashi, Tooru Mita, Yasuo Nakagawa, Toshimitsu Hamada, Hisafumi Iwata, Aizo Kaneda, Kouji Serizawa, Hiroyuki Tanaka, Koichi Sugimoto, Toshihiko Sakai, Keizo Matsukawa, Tsutomu Mimata
  • Patent number: 4768702
    Abstract: As a die bonding apparatus for establishing electrical connection between electrodes on one side of a semiconductor chip and associated electrodes on a package comprises a pair of pinching and pressing mechanisms having a pair of pinching and pressing surfaces adapted to be moved closer relative to each other and so as to pinch and press semiconductor chip and package and at least one remote center mechanism provided in at least one of the pair of pinching and pressing mechanisms, in such a manner that a remote center thereof is positioned in the pinching and pressing surface of above-mentioned one pinching and pressing mechanism, for adjusting orientations of the pair of pinching and pressing surfaces to make the orientations thereof correspond to those of both surfaces of the semiconductor chip and the package at the time of the pressing and pinching operation all of the electrodes on one side of the semiconductor chip are thereby uniformly pressed against the corresponding electrodes on the package without
    Type: Grant
    Filed: April 27, 1987
    Date of Patent: September 6, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Michio Takahashi, Shinichi Arai, Tooru Mita, Tatsuhiro Suzuki