Patents by Inventor Tooru Nagashima

Tooru Nagashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for manufacturing semiconductor silicon epitaxial wafer and semiconductor device
    Patent number: 6277193
    Abstract: A method for manufacturing semiconductor silicon epitaxial wafer and semiconductor device by which a gettering ability can be given to an epitaxial wafer in which the formation of BMD is not able to be expected in both low- and high-temperature device manufacturing processes, with the manufacturing processes being lower and higher than 1,050° C. in temperature, and has a specific resistance of ≧10 m&OHgr;·cm. When this method is used, such BMD that is sufficient to obtain gettering can be formed in both the low- and high-temperature processes, with the manufacturing processes being lower and higher than 1,050° C. in temperature, even in the epitaxial wafer having a specific resistance of ≧10 m&OHgr;·cm by performing low-temperature heat treatment at 650˜900° C.
    Type: Grant
    Filed: June 2, 1999
    Date of Patent: August 21, 2001
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Shinsuke Sadamitsu, Tooru Nagashima, Yasuo Koike, Masaharu Ninomiya, Takeshi Kii