Abstract: The present invention relates to an automatic focusing apparatus which permits an automatic focusing operation to occur with a high accuracy irrespective of the luminance of an object being sensed. The automatic focusing apparatus includes a focus lens, an image sensor, a focus motor for changing the position of the focus lens, a Y/C separating circuit for separating a luminance signal Y from the output of the image sensor, a non-linear circuit for subjecting the separated luminance signal Y to a non-linear processing, a high pass filter (HPE) extracting a high frequency component from the output of the non-linear circuit, an integrating circuit for integrating the extracted high frequency component and an in-focus detecting circuit for controlling the position of the focus lens based on the result of integration.

Abstract: A digital video camera includes a pseudo-saturation calculating circuit by which a pseudo-saturation corresponding to an actual saturation is calculated on the basis of two color difference signals, and a suppression coefficient is calculated by a suppression coefficient calculating circuit on the basis of the pseudo-saturation. Each of the color difference signals are outputted by a selecting circuit in a dot sequential manner, and multiplied by the suppression coefficient in a multiplying circuit. Therefore, a signal in which a low-saturation chrominance signal is outputted from the multiplying circuit, whereby the low-saturation chrominance signal can be suppressed even though a sampling frequency is not increased.

Abstract: An output from a solid state image sensing device spatially modulated by a color filter is A/D converted and stored in a field memory. Digital signals read from the field memory during electronic zooming are successively delayed by 1H period by means of first, second and third 1H delay elements connected in series. The output from the field memory and outputs from the first, second and third 1H delay elements are separated into luminance components and line sequential color components by first to fourth Y/C separating circuits, respectively. A first set of three primary color signals are calculated based on outputs from the first, second and third Y/C separating circuits, and a second set of three primary color signals are calculated based on outputs from the second, third and fourth Y/C separating circuits.

Abstract: A video signal processing circuit is incorporated in an IC for camcorder in which a camera signal outputted from a CCD image sensor is processed in a digital manner such that luminance and color signals can be outputted. In the IC, a vertical interpolation circuit produces two kinds of vertically interpolated data on the basis of a digital camera signal of one channel within an image area being set by an electronic zoom function. A YC separation circuit receives the two kinds of vertically interpolated data, and an output of the YC separation circuit is applied a horizontal interpolation circuit or an RGB composition circuit. If the YC separation output is applied to the horizontal interpolation circuit, the same outputs two kinds of horizontally interpolated data upon which three primary color signals are composed by the RGB composition circuit.

Abstract: A heat-sensitive recording material comprising a substrate, an intermediate layer disposed on said substrate and a heat sensitive recording layer disposed on said intermediate layer, characterized in that said intermediate layer contains a pigment of 80 cc/100 g or more in oil absorption as the main constituent and an alkaline pigment of 8 or more in PH value in an amount of 0.1 to 25% by weight on the total amount of the pigments contained in said intermediate layer.

Abstract: A circuit for generating a pulse-like timing signal driving a stepping motor which is used to drive for example a magnetic tape to run in an audio tape or video tape recording and reproducing apparatus. A rewritable memory stores output pattern data and time information for generating the timing signal. This timing signal generating circuit comprises a rewrite control circuit responsive to an operation mode instructing signal, for performing a predetermined operational processing on basic pattern data and basic time information and storing the resulting output pattern data and uniquely related time information in the rewritable memory.

Abstract: An amplifier circuit having a differential amplifier, provided in a semiconductor integrated circuit is disclosed. The differential amplifier has one input connected to a reference voltage generating circuit. The voltage outputted from the reference voltage generating circuit includes a voltage fluctuation depending on the fluctuation in power-supply voltage Vcc. However, a fluctuation absorbing circuit comprising resistors 51 and 52, diodes 53 and 54, and a capacitor 55 absorbs the voltage fluctuation thereof. As a result, the change in offset voltage of the differential amplifier is prevented, resulting in an improvement of a power-supply rejection ratio.