Abstract: A runtime programable RS decoder that can operate on multiple pieces of data during one clock cycle in order to generate, reduce, and evaluate polynomials involved in the decoding of an RS code, and which allows a user to choose the RS code after the circuit has been implemented.

Abstract: A memory block structure for use within a viterbi decoder includes multiple dual port RAMs configured as multiport RAMs. The memory block structure is configured to allow a one-word write operation and an N-word read operation during a single clock cycle in order to achieve one decoded output symbol per clock period using the viterbi algorithm. By using dual port RAMs, a more densely packed and less expensive memory block structure is achieved. An encoded stream of input symbols are input to the viterbi decoder and written to the memory block structure one word at a time. Once X+Y bits have been written to the memory block structure, the decoder will then read N words from the memory block structure, simultaneously, reading back through X+Y words and outputting Y bits N at a time at the end of the trace back through memory.

Abstract: The present invention is for a Error Correction Unit (ECU) that uses a single stack architecture for the generation, reduction and evaluation of the polynomials involved in the correction of a Reed-Solomon code. The circuit uses the same hardware to generate the syndromes, reduce the .OMEGA.(x) and .LAMBDA.(x) polynomials and evaluate the .OMEGA.(x) and .LAMBDA.(x) polynomials. Some of the specifics involved in calculating and reducing the polynomials mentioned above are novel as well. First, the implementation of the general Galois field multiplier is new and faster than previous implementations. Second, the circuit for implementing the Galois field inverse function has not appeared in prior art designs. Third, a novel method of generating the .OMEGA.(x) and .LAMBDA.(x) polynomials (including alignment of these polynomials prior to evaluation) is utilized. Fourth, corrections are performed in the same order as they are received using a premultiplication step prior to evaluation.