Patents by Inventor Torsten Bacher

Torsten Bacher has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11507525
    Abstract: A method for communicating between a master and a plurality of slaves includes generating a communication frame including generating a slave data frame in each slave. The slave data frame has a data packet including one or more data bytes and at least one gap of variable time length comprising no information in the slave data frame. The gap may be at the beginning of said slave data frame before the beginning of the first data byte of said data packet and/or at the end of said data packet after the end of a last data byte of said data packet, where the gaps have a time length dependency based on parameters locally stored in each of said at least one slave. The slave data frame is transmitted sequentially where the gap increases for each subsequent slave.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: November 22, 2022
    Assignee: MELEXIS TECHNOLOGIES NV
    Inventors: Eric Sachse, Torsten Bacher, Thomas Freitag
  • Publication number: 20210406210
    Abstract: A method for communicating between a master and a plurality of slaves includes generating a communication frame including generating a slave data frame in each slave. The slave data frame has a data packet including one or more data bytes and at least one gap of variable time length comprising no information in the slave data frame. The gap may be at the beginning of said slave data frame before the beginning of the first data byte of said data packet and/or at the end of said data packet after the end of a last data byte of said data packet, where the gaps have a time length dependency based on parameters locally stored in each of said at least one slave. The slave data frame is transmitted sequentially where the gap increases for each subsequent slave.
    Type: Application
    Filed: June 29, 2021
    Publication date: December 30, 2021
    Inventors: Eric SACHSE, Torsten BACHER, Thomas FREITAG
  • Patent number: 7295824
    Abstract: A WLAN (Wireless Local Area Network) communication device comprising a WLAN frequency synthesizer for generating a synthesizer signal suitable for modulating a transmission signal and/or demodulating a reception signal and corresponding methods and integrated circuit chips are provided. The WLAN frequency synthesizer comprises a reference oscillator for generating a first reference clock signal, a fractional-N PLL (Phase-Locked Loop) unit for receiving a second reference clock signal and converting the second reference clock signal into the synthesizer signal, and a frequency multiplier for receiving the first reference clock signal and converting the first reference clock signal into the second reference clock signal to be forwarded to the fractional-N PLL unit by multiplying the frequency of the first reference clock signal by a multiplication factor. Embodiments may provide shorter settling times and/or enhanced spurious suppression of the fractional-N PLL unit.
    Type: Grant
    Filed: October 14, 2004
    Date of Patent: November 13, 2007
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Wolfram Kluge, Torsten Bacher, Rolf Jaehne
  • Publication number: 20050245200
    Abstract: A WLAN (Wireless Local Area Network) communication device comprising a WLAN frequency synthesizer for generating a synthesizer signal suitable for modulating a transmission signal and/or demodulating a reception signal and corresponding methods and integrated circuit chips are provided. The WLAN frequency synthesizer comprises a reference oscillator for generating a first reference clock signal, a fractional-N PLL (Phase-Locked Loop) unit for receiving a second reference clock signal and converting the second reference clock signal into the synthesizer signal, and a frequency multiplier for receiving the first reference clock signal and converting the first reference clock signal into the second reference clock signal to be forwarded to the fractional-N PLL unit by multiplying the frequency of the first reference clock signal by a multiplication factor. Embodiments may provide shorter settling times and/or enhanced spurious suppression of the fractional-N PLL unit.
    Type: Application
    Filed: October 14, 2004
    Publication date: November 3, 2005
    Inventors: Wolfram Kluge, Torsten Bacher, Rolf Jaehne