Patents by Inventor Torsten HELM

Torsten HELM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit and method of forming an integrated circuit
    Patent number: 10748807
    Abstract: A semiconductor device includes a semiconductor body having a main surface and a rear surface opposite the main surface, and a trench that extends from the main surface of the semiconductor body towards the rear surface, the trench having an upper trench portion and a lower trench portion, the trench having a width measured along a plane parallel to the main surface. The upper trench portion includes curved sidewalls that that bow outward from a bottom of the upper trench portion. The lower trench portion includes generally planar sidewalls that extend from bottom of the upper trench portion at a first depth into the semiconductor body along the first direction to a contact region. An electrically conductive contact electrode is within the trench, is electrically insulated from the semiconductor body along sidewalls of the trench, and electrically connects to the semiconductor body at a bottom of the trench.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: August 18, 2020
    Assignee: Infineon Technologies AG
    Inventors: Torsten Helm, Marc Probst, Uwe Rudolph
  • Integrated Circuit and Method of Forming an Integrated Circuit
    Publication number: 20190198380
    Abstract: A semiconductor device includes a semiconductor body having a main surface and a rear surface opposite the main surface, and a trench that extends from the main surface of the semiconductor body towards the rear surface, the trench having an upper trench portion and a lower trench portion, the trench having a width measured along a plane parallel to the main surface. The upper trench portion includes curved sidewalls that that bow outward from a bottom of the upper trench portion. The lower trench portion includes generally planar sidewalls that extend from bottom of the upper trench portion at a first depth into the semiconductor body along the first direction to a contact region. An electrically conductive contact electrode is within the trench, is electrically insulated from the semiconductor body along sidewalls of the trench, and electrically connects to the semiconductor body at a bottom of the trench.
    Type: Application
    Filed: March 6, 2019
    Publication date: June 27, 2019
    Inventors: Torsten Helm, Marc Probst, Uwe Rudolph
  • Integrated circuit and method of forming an integrated circuit
    Patent number: 10262889
    Abstract: An integrated circuit includes a first trench disposed in a semiconductor material, wherein a width of the first trench in an upper portion of the first trench adjacent to a surface of the semiconductor material is smaller than a width of the first trench in a lower portion of the first trench, the lower portion being disposed within the semiconductor material, each width being measured in a plane parallel to a surface of the semiconductor material, each width denoting a distance between inner faces of remaining semiconductor material portions or between outer faces of a filling disposed in the first trench, or between an inner face of a remaining semiconductor material portion and an outer face of a filling disposed in the first trench.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: April 16, 2019
    Assignee: Infineon Technologies AG
    Inventors: Torsten Helm, Marc Probst, Uwe Rudolph
  • METHOD OF FABRICATING ISOLATING SEMICONDUCTOR STRUCTURES
    Publication number: 20150203350
    Abstract: Embodiments related to semiconductor manufacturing and semiconductor devices with semiconductor structure are described and depicted.
    Type: Application
    Filed: March 31, 2015
    Publication date: July 23, 2015
    Inventors: Thoralf KAUTZSCH, Boris BINDER, Torsten HELM, Stefan KOLB, Marc PROBST, Uwe RUDOLPH
  • Method of fabricating isolating semiconductor structures using a layout of trenches and openings
    Patent number: 8994127
    Abstract: Embodiments related to semiconductor manufacturing and semiconductor devices with semiconductor structure are described and depicted.
    Type: Grant
    Filed: November 24, 2011
    Date of Patent: March 31, 2015
    Assignee: Infineon Technologies AG
    Inventors: Thoralf Kautzsch, Boris Binder, Torsten Helm, Stefan Kolb, Marc Probst, Uwe Rudolph
  • INTEGRATED CIRCUIT AND METHOD OF FORMING AN INTEGRATED CIRCUIT
    Publication number: 20130187159
    Abstract: An integrated circuit includes a first trench disposed in a semiconductor material, wherein a width of the first trench in an upper portion of the first trench adjacent to a surface of the semiconductor material is smaller than a width of the first trench in a lower portion of the first trench, the lower portion being disposed within the semiconductor material, each width being measured in a plane parallel to a surface of the semiconductor material, each width denoting a distance between inner faces of remaining semiconductor material portions or between outer faces of a filling disposed in the first trench, or between an inner face of a remaining semiconductor material portion and an outer face of a filling disposed in the first trench.
    Type: Application
    Filed: January 23, 2012
    Publication date: July 25, 2013
    Applicant: Infineon Technologies AG
    Inventors: Torsten Helm, Marc Probst, Uwe Rudolph
  • Method of fabricating isolated semiconductor structures
    Publication number: 20130134530
    Abstract: Embodiments related to semiconductor manufacturing and semiconductor devices with semiconductor structure are described and depicted.
    Type: Application
    Filed: November 24, 2011
    Publication date: May 30, 2013
    Inventors: Thoralf KAUTZSCH, Boris BINDER, Torsten HELM, Stefan KOLB, Marc PROBST, Uwe RUDOLPH