Patents by Inventor Torsten Kramer

Torsten Kramer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12145808
    Abstract: A method and to a device for handling hygiene products, in particular nappies, wherein the products are transported by a feed conveyor in a first transport direction into compartments of a removal conveyor, in particular a grouping conveyor, which transports the products in a second transport direction, wherein the second transport direction extends transversely, in particular perpendicularly, to the first transport direction. At least one intermediate conveyor which serves to reduce the transport speed of the products in the first transport direction is located between the feed conveyor and the removal conveyor.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: November 19, 2024
    Assignee: Focke & Co. (GmbH & Co. KG)
    Inventors: Matthias Vocks, Andreas Prahm, Arthur Wilhelm, Torsten Kramer
  • Publication number: 20230249921
    Abstract: A method and to a device for handling hygiene products, in particular nappies, wherein the products are transported by a feed conveyor in a first transport direction into compartments of a removal conveyor, in particular a grouping conveyor, which transports the products in a second transport direction, wherein the second transport direction extends transversely, in particular perpendicularly, to the first transport direction. At least one intermediate conveyor which serves to reduce the transport speed of the products in the first transport direction is located between the feed conveyor and the removal conveyor.
    Type: Application
    Filed: June 24, 2021
    Publication date: August 10, 2023
    Applicant: Focke & Co. (GmbH & Co. KG)
    Inventors: Matthias Vocks, Andreas Prahm, Arthur Wilhelm, Torsten Kramer
  • Patent number: 11208319
    Abstract: A method for manufacturing a MEMS unit for a micromechanical pressure sensor. The method includes the steps: providing a MEMS wafer including a silicon substrate and a first cavity formed therein, under a sensor membrane; applying a layered protective element on the MEMS water; and exposing a sensor core from the back side, a second cavity being formed between the sensor core and the surface of the silicon substrate, and the second cavity being formed with the aid of an etching process which is carried out with the aid of etching parameters changed in a defined manner; and removing the layered protective element.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: December 28, 2021
    Assignee: Robert Bosch GmbH
    Inventors: Arne Dannenberg, Joachim Fritz, Thomas Friedrich, Torsten Kramer
  • Patent number: 10988377
    Abstract: A method for producing a micromechanical pressure sensor. The method includes: providing a MEMS wafer having a silicon substrate and a first cavity developed therein underneath a sensor diaphragm; providing a second wafer; bonding the MEMS wafer to the second wafer; and exposing a sensor core from the rear side; a second cavity being formed in the process between the sensor core and the surface of the silicon substrate, and the second cavity being developed with the aid of an etching process which is carried out using etching parameters that are modified in a defined manner.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: April 27, 2021
    Assignee: Robert Bosch GmbH
    Inventors: Arne Dannenberg, Torsten Kramer, Joachim Fritz, Thomas Friedrich
  • Patent number: 10950455
    Abstract: A method for manufacturing a semiconductor device in which a semiconductor substrate is provided, including a SOI-wafer having a carrier layer defining a rear side, a functional layer defining a front side. An insulation layer is situated between the carrier layer and functional layer. The functional layer includes a functional area having functional structures. The front side is masked, a first mask opening defines an interior area containing the functional area. The functional layer is removed by etching the front side. The rear side is masked, a second mask opening being configured, and a circumferential edge of the second mask opening is spaced outwardly relative to an outer circumferential edge of the interior area. The carrier layer and the insulation layer are removed at least in the area of the second-mask opening by etching to expose the interior area.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: March 16, 2021
    Assignee: Robert Bosch GmbH
    Inventors: Zhenyu Wu, Jens Schindele, Torsten Kramer
  • Publication number: 20200090942
    Abstract: A method for manufacturing a semiconductor-device in which a semiconductor-substrate is provided, including a SOI-wafer having a carrier-layer (CL) defining a rear-side, a functional-layer (FL), an insulation-layer (IL) situated between the CL and FL, and a passivation-layer (PL) applied to the FL and defining a front-side. The FL includes a functional-area having functional-structures. The front-side of the semiconductor-substrate is masked, a first-mask opening being configured, which defines an interior-area containing the functional-area, and the PL and FL are removed by etching the front-side of the semiconductor-substrate. The rear-side of the semiconductor-substrate is masked, a second-mask opening being configured, and a circumferential-edge of the second-mask opening being spaced outwardly relative to an outer-circumferential-edge of the interior-area.
    Type: Application
    Filed: September 17, 2019
    Publication date: March 19, 2020
    Inventors: Zhenyu Wu, Jens Schindele, Torsten Kramer
  • Publication number: 20200024133
    Abstract: A method for manufacturing a MEMS unit for a micromechanical pressure sensor. The method includes the steps: providing a MEMS wafer including a silicon substrate and a first cavity formed therein, under a sensor membrane; applying a layered protective element on the MEMS water; and exposing a sensor core from the back side, a second cavity being formed between the sensor core and the surface of the silicon substrate, and the second cavity being formed with the aid of an etching process which is carried out with the aid of etching parameters changed in a defined manner; and removing the layered protective element.
    Type: Application
    Filed: February 13, 2018
    Publication date: January 23, 2020
    Inventors: Arne Dannenberg, Joachim Fritz, Thomas Friedrich, Torsten Kramer
  • Patent number: 10473683
    Abstract: A sensor element for thermal anemometry includes a semiconductor substrate and a thin-film diaphragm attached to the semiconductor substrate and having a front side and a rear side. A resistive heating element and a temperature-dependent resistor are attached to the front side of the thin-film diaphragm. In the area of the rear side of the thin-film diaphragm, the semiconductor substrate has a first recess. A silicon layer including a recess which merges with the first recess of the semiconductor substrate is located between the thin-film diaphragm and the semiconductor substrate.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: November 12, 2019
    Assignee: Robert Bosch GmbH
    Inventors: Florian Schoen, Christian Lemier, Torsten Kramer
  • Publication number: 20190202687
    Abstract: A method for producing a micromechanical pressure sensor. The method includes: providing a MEMS wafer having a silicon substrate and a first cavity developed therein underneath a sensor diaphragm; providing a second wafer; bonding the MEMS wafer to the second wafer; and exposing a sensor core from the rear side; a second cavity being formed in the process between the sensor core and the surface of the silicon substrate, and the second cavity being developed with the aid of an etching process which is carried out using etching parameters that are modified in a defined manner.
    Type: Application
    Filed: September 18, 2017
    Publication date: July 4, 2019
    Inventors: Arne Dannenberg, Torsten Kramer, Joachim Fritz, Thomas Friedrich
  • Patent number: 9926188
    Abstract: A sensor unit including a first semiconductor component and a second semiconductor component, the first semiconductor component including a first substrate and a sensor structure. The second semiconductor component includes a second substrate, the first and second semiconductor components being connected to each other with the aid of a wafer connection, the sensor unit having a decoupling structure, which is configured in such a way that the sensor structure is decoupled thermally and/or mechanically from the second semiconductor component.
    Type: Grant
    Filed: February 5, 2015
    Date of Patent: March 27, 2018
    Assignee: ROBERT BOSCH GMBH
    Inventors: Johannes Classen, Torsten Kramer, Hubert Benzel, Jens Frey, Daniel Christoph Meisel, Christoph Schelling
  • Publication number: 20170299622
    Abstract: A sensor element for thermal anemometry includes a semiconductor substrate and a thin-film diaphragm attached to the semiconductor substrate and having a front side and a rear side. A resistive heating element and a temperature-dependent resistor are attached to the front side of the thin-film diaphragm. In the area of the rear side of the thin-film diaphragm, the semiconductor substrate has a first recess. A silicon layer including a recess which merges with the first recess of the semiconductor substrate is located between the thin-film diaphragm and the semiconductor substrate.
    Type: Application
    Filed: April 7, 2017
    Publication date: October 19, 2017
    Inventors: Florian Schoen, Christian Lemier, Torsten Kramer
  • Publication number: 20170203958
    Abstract: A sensor unit including a first semiconductor component and a second semiconductor component, the first semiconductor component including a first substrate and a sensor structure. The second semiconductor component includes a second substrate, the first and second semiconductor components being connected to each other with the aid of a wafer connection, the sensor unit having a decoupling structure, which is configured in such a way that the sensor structure is decoupled thermally and/or mechanically from the second semiconductor component.
    Type: Application
    Filed: February 5, 2015
    Publication date: July 20, 2017
    Inventors: Johannes CLASSEN, Torsten KRAMER, Hubert BENZEL, Jens FREY, Daniel Christoph MEISEL, Christoph SCHELLING
  • Publication number: 20170081177
    Abstract: An interposer is provided which is made up of a flat carrier substrate including at least one front wiring plane, in which front terminal pads are formed for mounting a component on the interposer, including at least one rear wiring plane, in which rear terminal pads are formed for mounting on a component carrier, the front terminal pads and the rear terminal pads being arranged offset from each other; and including vias for electrical connection of the at least one front wiring plane and the at least one rear wiring plane. The carrier substrate includes at least one edge section and at least one center section, which are at least largely mechanically decoupled via a stress-decoupling structure. The front terminal pads are arranged exclusively on the center section for mounting the component, while the rear terminal pads are arranged exclusively on the edge section for mounting on a component carrier.
    Type: Application
    Filed: May 29, 2015
    Publication date: March 23, 2017
    Applicant: Robert Bosch GmbH
    Inventors: Reinhard Neul, Johannes Classen, Torsten Kramer, Jochen Reinmuth, Mirko Hattass, Lars Tebje, Daniel Christoph Meisel, Ralf Reichenbach, Friedjof Heuck, Antoine Puygranier
  • Patent number: 9475693
    Abstract: Measures are provided which are used for stabilizing the substructure of the connecting areas of ASIC elements. These measures relate to ASIC elements including an ASIC substrate, into which electrical circuit functions are integrated, and including an ASIC layer structure on the ASIC substrate, which includes multiple wiring levels for the circuit functions, which are separated from one another by insulation layers and are interconnected via metallic plugs. At least one connecting area for placing wire bonds or for wafer bonding is implemented in at least one of the uppermost wiring levels. At least one chain of metallic plugs arranged vertically in a direct line is implemented in the ASIC layer structure below the connecting area, which extends from the uppermost wiring level up to the ASIC substrate or oxide trenches introduced therein.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: October 25, 2016
    Assignee: ROBERT BOSCH GMBH
    Inventors: Daniel Christoph Meisel, Christoph Schelling, Torsten Kramer, Jens Frey
  • Publication number: 20150353345
    Abstract: Method for on-chip stress decoupling to reduce stresses in a vertical hybrid integrated component including MEMS and ASIC elements and to mechanical decoupling of the MEMS structure. The MEMS/ASIC elements are mounted above each other via at least one connection layer and form a chip stack. On the assembly side, at least one connection area is formed for the second level assembly and for external electrical contacting of the component on a component support. At least one flexible stress decoupling structure is formed in one element surface between the assembly side and the MEMS layered structure including the stress-sensitive MEMS structure, in at least one connection area to the adjacent element component of the chip stack or to the component support, the stress decoupling structure being configured so that the connection material does not penetrate into the stress decoupling structure and flexibility of the stress decoupling structure is ensured.
    Type: Application
    Filed: June 5, 2015
    Publication date: December 10, 2015
    Inventors: Friedjof HEUCK, Ralf REICHENBACH, Daniel Christoph MEISEL, Lars TEBJE, Mirko HATTASS, Jochen REINMUTH, Torsten KRAMER, Johannes CLASSEN, Reinhard NEUL, Antoine PUYGRANIER
  • Publication number: 20150353343
    Abstract: Measures are provided which are used for stabilizing the substructure of the connecting areas of ASIC elements. These measures relate to ASIC elements including an ASIC substrate, into which electrical circuit functions are integrated, and including an ASIC layer structure on the ASIC substrate, which includes multiple wiring levels for the circuit functions, which are separated from one another by insulation layers and are interconnected via metallic plugs. At least one connecting area for placing wire bonds or for wafer bonding is implemented in at least one of the uppermost wiring levels. At least one chain of metallic plugs arranged vertically in a direct line is implemented in the ASIC layer structure below the connecting area, which extends from the uppermost wiring level up to the ASIC substrate or oxide trenches introduced therein.
    Type: Application
    Filed: June 8, 2015
    Publication date: December 10, 2015
    Inventors: Daniel Christoph MEISEL, Christoph SCHELLING, Torsten KRAMER, Jens FREY
  • Patent number: 8530261
    Abstract: A method for producing a component having at least one diaphragm formed in the upper surface of the component, which diaphragm spans a cavity, and having at least one access opening to the cavity from the back side of the component, at least one first diaphragm layer and the cavity being produced in a monolithic semiconductor substrate from the upper surface of the component, and the access opening being produced in a temporally limited etching step from the back side of the substrate. The access opening is placed in a region in which the substrate material comes up to the first diaphragm layer.
    Type: Grant
    Filed: November 28, 2007
    Date of Patent: September 10, 2013
    Assignee: Robert Bosch GmbH
    Inventors: Torsten Kramer, Kathrin Knese, Hubert Benzel, Gregor Schuermann, Simon Armbruster, Christoph Schelling
  • Patent number: 8519494
    Abstract: A method for manufacturing a micromechanical diaphragm structure having access from the rear of the substrate includes: n-doping at least one contiguous lattice-type area of a p-doped silicon substrate surface; porously etching a substrate area beneath the n-doped lattice structure; producing a cavity in this substrate area beneath the n-doped lattice structure; growing a first monocrystalline silicon epitaxial layer on the n-doped lattice structure; at least one opening in the n-doped lattice structure being dimensioned in such a way that it is not closed by the growing first epitaxial layer but instead forms an access opening to the cavity; an oxide layer being created on the cavity wall; a rear access to the cavity being created, the oxide layer on the cavity wall acting as an etch stop layer; and the oxide layer being removed in the area of the cavity.
    Type: Grant
    Filed: April 21, 2009
    Date of Patent: August 27, 2013
    Assignee: Robert Bosch GmbH
    Inventors: Torsten Kramer, Marcus Ahles, Armin Grundmann, Kathrin Knese, Hubert Benzel, Gregor Schuermann, Simon Armbruster
  • Patent number: 8470631
    Abstract: A simple and economical method for manufacturing very thin capped MEMS components. In the method, a large number of MEMS units are produced on a component wafer. A capping wafer is then mounted on the component wafer, so that each MEMS unit is provided with a capping structure. Finally, the MEMS units capped in this way are separated to form MEMS components. A diaphragm layer is formed in a surface of the capping wafer by using a surface micromechanical method to produce at least one cavern underneath the diaphragm layer, support points being formed that connect the diaphragm layer to the substrate underneath the cavern. The capping wafer structured in this way is mounted on the component wafer in flip chip technology, so that the MEMS units of the component wafer are capped by the diaphragm layer. The support points are then cut through in order to remove the substrate.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: June 25, 2013
    Assignee: Robert Bosch GmbH
    Inventors: Torsten Kramer, Kathrin Knese, Hubert Benzel, Karl-Heinz Kraft, Simon Armbruster
  • Patent number: 8405210
    Abstract: A production method for chips, in which as many method steps as possible are carried out in the wafer composite, that is, in parallel for a plurality of chips disposed on a wafer. This is a method for producing a plurality of chips whose functionality is implemented on the basis of the surface layer of a substrate. In this method, the surface layer is patterned and at least one cavity is produced below the surface layer, so that the individual chip regions are connected to each other and/or to the rest of the substrate by suspension webs only, and/or so that the individual chip regions are connected to the substrate layer below the cavity via supporting elements in the region of the cavity. The suspension webs and/or supporting elements are cut when the chips are separated. The patterned and undercut surface layer of the substrate is embedded in a plastic mass before the chips are separated.
    Type: Grant
    Filed: July 24, 2008
    Date of Patent: March 26, 2013
    Assignee: Robert Bosch GmbH
    Inventors: Torsten Kramer, Matthias Boehringer, Stefan Pinter, Hubert Benzel, Matthias Illing, Frieder Haag, Simon Ambruster