Patents by Inventor Torsten Mahnke

Torsten Mahnke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7595627
    Abstract: A voltage reference circuit is provided. The voltage reference circuit includes a first PTAT voltage generator and an amplifier. The first PTAT voltage generator is operable to generate a first PTAT voltage. The amplifier, which is coupled to the first PTAT voltage generator, comprises a second PTAT voltage generator that is complementary to the first PTAT voltage generator. The second PTAT voltage generator is operable to generate a second PTAT voltage. The amplifier is operable to generate a reference voltage based on the first PTAT voltage and the second PTAT voltage.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: September 29, 2009
    Assignee: National Semiconductor Corporation
    Inventors: Torsten Mahnke, Stephan Drebinger, Michael Brauer
  • Patent number: 7535750
    Abstract: Asymmetrical random access memory cell (1) including cross coupled inverters (2, 3) which are driven at their nodes (22, 32) by separate bit-lines (blt, blc) of a pair of complementary bit-lines, which are connected via a pass-transistor (21, 31), wherein the random access memory cell is asymmetrical by means of the cross coupled inverters (2, 3) which have asymmetrically physical behaviours whereby different switching thresholds of the inverters are present, and that the pass-transistors (21, 31) are driven by separate controlled wordlines (wl, wwl).
    Type: Grant
    Filed: January 16, 2007
    Date of Patent: May 19, 2009
    Assignee: International Business Machines Corporation
    Inventors: Otto Wagner, Sebastian Ehrenreich, Torsten Mahnke, Anthony Gus Aipperspach
  • Patent number: 7495949
    Abstract: An asymmetrical random access memory cell (1) including cross coupled inverters (2, 3) which are driven at their nodes (22, 32) by separate bit-lines (blt, blc) of a pair of complementary bit-lines, which are connected via a pass-transistors (21, 31), wherein said cross coupled inverters (2, 3) have different switching thresholds and exhibit asymmetrical physical behaviours, wherein an additional pass-transistor (4) is provided in series to one of the pass-transistors (21) between one of the nodes (22) and its dedicated bit-line (blc). Further the invention relates to a random access memory including such memory cells and to a method of operating such a memory.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: February 24, 2009
    Assignee: International Business Machines Corporation
    Inventors: Stefan Buettner, Torsten Mahnke, Wolfgang Penth, Otto Wagner
  • Publication number: 20070189061
    Abstract: Asymmetrical random access memory cell, memory comprising asymmetrical memory cells and method to operate such a memory The invention relates to an asymmetrical random access memory cell (1) comprising cross coupled inverters (2, 3) which are driven at their nodes (22, 32) by separate bit-lines (b1t, b1c) of a pair of complementary bit-lines, which are connected via a pass-transistors (21, 31), wherein said cross coupled inverters (2, 3) have different switching thresholds and exhibit asymmetrical physical behaviours, wherein an additional pass-transistor (4) is provided in series to one of the pass-transistors (21) between one of the nodes (22) and its dedicated bit-line (blc). Further the invention relates to a random access memory comprising such memory cells and to a method of operating such a memory.
    Type: Application
    Filed: January 31, 2007
    Publication date: August 16, 2007
    Inventors: Stefan Buettner, Torsten Mahnke, Wolfgang Penth, Otto Wagner
  • Publication number: 20070165447
    Abstract: Asymmetrical random access memory cell (1) comprising cross coupled inverters (2, 3) which are driven at their nodes (22, 32) by separate bit-lines (blt, blc) of a pair of complementary bit-lines, which are connected via a pass-transistor (21, 31), wherein the random access memory cell is asymmetrical by means of the cross coupled inverters (2, 3) which have asymmetrically physical behaviours whereby different switching thresholds of the inverters are present, and that the pass-transistors (21, 31) are driven by separate controlled wordlines (wl, wwl). Furthermore the invention relates to a random access memory comprising a plurality of such asymmetrical random access memory cells and to a method to operate such a random access memory.
    Type: Application
    Filed: January 16, 2007
    Publication date: July 19, 2007
    Inventors: Otto Wagner, Sebastian Ehrenreich, Torsten Mahnke, Anthony Gus Aipperspach