Abstract: The invention relates to a module for a measuring device and to a measuring device. The inventive module for a measuring device is provided with a plug-in contact element for the electrical contact of the plug-and-socket plate of the measuring device which is used for data transfer. Said module for the measuring device comprises a main circuit card arranged in the first circuit card space. Said first circuit card space is formed by at least one first element of the body which encompasses the circuit card in a closed manner on the level of the external periphery thereof.

Abstract: Described is a fluidic microsystem (100) including at least one channel (10) through which a particle suspension can flow; and first and second electrode devices (40, 60) which are arranged on first and second channel walls (21, 31) for generating electrical alternating-voltage fields in the channel (10); wherein the first electrode device (40) for field shaping in the channel includes at least one first structure element (41, 51); and the second electrode device (60) includes an area-like electrode layer (61) with a closed second electrode surface which includes a second passivation layer (70); wherein the effective electrode surface of the first structure element (41, 51), of which element (41, 51) there is at least one, is smaller than the second electrode surface; and the second passivation layer (70) is a closed layer which completely covers the second electrode layer (61).

Abstract: A communications network and corresponding method comprising topology means for detecting the topology of the network means for detecting the timing status of each node and for providing to at least one node of the communications network information on the detected topology of the network and timing status and for selecting a source of timing information on the basis of the information detected.

Abstract: A method for fabricating stacked non-volatile memory cells and non-volatile memory cell arrays are disclosed. A semiconductor wafer is provided having a charge-trapping layer and a conductive layer deposited on the surface of the semiconductor wafer. Using a mask layer on top of the conductive layer, contact holes are formed into which a contact fill material is deposited. A further conductive layer is deposited on the surface of the semiconductor wafer and is patterned so as to form word lines. The contact fill material is connected to a contact plug using the contact holes with the contact fill material as a landing pad.

Abstract: The invention relates to a module for a measuring device and to a measuring device. The inventive module for a measuring device is provided with a plug-in contact element for the electrical contact of the plug-and-socket plate of the measuring device which is used for data transfer. Said module for the measuring device comprises a main circuit card arranged in the first circuit card space. Said first circuit card space is formed by at least one first element of the body which encompasses the circuit card in a closed manner on the level of the external periphery thereof.

Abstract: A device includes an array of memory cells, which are arranged vertically to a main substrate surface. The array is provided with lower bitlines, wordlines and upper bitlines. The lower and upper bitlines are contact-connected to lower source/drain regions and corresponding upper source/drain regions, respectively, in such a manner that a unique addressing of individual memory cells is possible.

Abstract: A periodic pattern of conductor tracks with broader interspaces is produced by the application of a totally periodic pattern and subsequent removal of individual conductor tracks. An alternative method comprises the formation of a completely periodic hardmask, from which individual parts are removed. The modified hardmask is then used to etch a periodic pattern of conductor tracks with intermediate broader spaces.

Abstract: A method for fabricating stacked non-volatile memory cells and non-volatile memory cell arrays are disclosed. A semiconductor wafer is provided having a charge-trapping layer and a conductive layer deposited on the surface of the semiconductor wafer. Using a mask layer on top of the conductive layer, contact holes are formed into which a contact fill material is deposited. A further conductive layer is deposited on the surface of the semiconductor wafer and is patterned so as to form word lines. The contact fill material is connected to a contact plug using the contact holes with the contact fill material as a landing pad.

Abstract: A plurality of planar electrodes (5) in a microchannel (4) is used for separation, lysis and PCR in a chip (10). Cells from a sample are brought to the electrodes (5). Depending on sample properties, phase pattern, frequency and voltage of the electrodes and flow velocity are chosen to trap target cells (16) using DEP, whereas the majority of unwanted cells (17) flushes through. After separation the target cell (16) are lysed while still trapped. Lysis is carried out by applying RF pulses and/or thermally so as to change the dielectric properties of the trapped cells. After lysis, the target cells (16) are amplified within the microchannel (4), so as to obtain separation, lysis and PCR on same chip (1).

Abstract: The invention relates to a module for a measuring device and to a measuring device. The inventive module for a measuring device is provided with a plug-in contact element for the electrical contact of the plug-and-socket plate of the measuring device which is used for data transfer. Said module for the measuring device comprises a main circuit card arranged in the first circuit card space. Said first circuit card space is formed by at least one first element of the body which encompasses the circuit card in a closed manner on the level of the external periphery thereof.

Abstract: The invention relates to a module for a measuring device and to a measuring device. The inventive module for a measuring device is provided with a plug-in contact element for the electrical contact of the plug-and-socket plate of the measuring device which is used for data transfer. Said module for the measuring device comprises a main circuit card arranged in the first circuit card space. Said first circuit card space is formed by at least one first element of the body which encompasses the circuit card in a closed manner on the level of the external periphery thereof.

Abstract: A method is provided for fabricating stacked non-volatile memory cells. A semiconductor wafer is provided having a plurality of diffusion regions forming buried bit lines. A charge-trapping layer and a conductive layer are deposited on the surface of the semiconductor wafer. Using a mask layer on top of the conductive layer, contact holes are formed wherein an insulating layer is formed. An etch stop layer is deposited on the surface of the semiconductor wafer. Above the etch stop layer, a dielectric layer is deposited and is patterned so as to form contact holes. Subsequently, the contact holes are enlarged through the etch stop layer and the insulating layer to the buried bit lines.

Abstract: The bit lines are produced by an implantation of a dopant by means of a sacrificial hard mask layer, which is later replaced with the gate electrodes formed of polysilicon in the memory cell array. Striplike areas of the memory cell array, which run transversely to the bit lines, are reserved by a blocking layer to be occupied by the bit line contacts. In these areas, the hard mask is used to form contact holes, which are self-aligned with the implanted buried bit lines. Between the blocked areas, the word lines are arranged normally to the bit lines.

Abstract: A semiconductor product (1) includes a plurality of wordlines extending along a first lateral direction (x) along a substrate surface (22) and also includes contact structures (3) as well as filling structures (4) therebetween. Along the first direction (x) the contact structures (3) and the filling structures (4) are arranged in alternating order between two respective wordlines. Each contact structure (3) serves to connect two active areas (23) separated by one respective trench isolation filling (24) to a respective bitline (14). Accordingly, the width of the first contact structures (3) is much larger than the width of the bitlines (14) along the first direction (x). According to embodiments of the invention, tapered upper portions (9) of the contact structures (3) are shaped, the upper portions (9) having a width being significantly smaller than the width of the contact structures (3) along the first direction (x).

Abstract: A semiconductor substrate is provided with a recess. A memory layer or memory layer sequence is applied to sidewalls and the bottom of the recess. The memory layer is formed into two separate portions at opposite sidewalls of the recess either by reducing the memory layer to sidewall spacers or by forming sidewall spacers and removing portions of the memory layer that are not covered by the spacers. A gate electrode is applied into the recess, and source/drain regions are formed by an implantation of doping atoms adjacent to the sidewalls of the recess and the remaining portions of the memory layer. The memory layer can especially be a dielectric material suitable for charge-trapping.

Abstract: Dielectric gratings are formed between the word line stacks. Spacers are applied to the sidewalls of the word line stacks and the dielectric gratings. In the openings between the spacers, silicon is epitaxially grown on the upper surfaces of source/drain regions, which are implanted self-aligned to the word line stacks. A silicide is formed on the grown silicon, and a metal layer is applied and structured to form local interconnects, which connect the source/drain regions to upper bit lines.

Abstract: A semiconductor product includes, a substrate with a first dielectric layer having contact hole fillings for contacting active areas in the substrate. A second dielectric layer with contact holes is provided therein. The contact holes have a width in a first lateral direction. The product further includes conductive lines, each conductive line passing over contact holes in the second dielectric layer and contacting a plurality of contact hole fillings in the first dielectric layer. The conductive lines have a width, in the first lateral direction, that is smaller than the width of the contact holes of the second dielectric layer. The conductive lines are in direct mechanical contact with the contact hole fillings and thereby remove the need to provide any conventional “contact to interconnect” structures.

Abstract: Described are a method and a measuring device for measuring the impedance in a fluidic microsystem comprising a compartment (10) through which a liquid comprising at least one suspended particle (16) flows, and in which at least one impedance detector (40) is arranged, by means of which for detection of the at least one particle at least one impedance value is acquired which is characteristic for the impedance of the compartment, and which in the presence of the at least one particle changes in a predetermined way, wherein focusing of the at least one particle takes place in a predetermined space relative to the impedance detector, wherein focusing involves a movement of the at least one particle relative to the fluid flowing in the compartment as a result of dielectrophoretic forces, which forces are exerted by means of at least two focusing electrodes (30).

Abstract: A microsystem adapted for dielectrophoretic manipulation of particles in a suspension liquid wherein the microsystem has a channel with channel walls and a longitudinal extension. An electrode arrangement is present which has at least one microelectrode on at least one of the channel walls. This acts to generate a field barrier which crosses the channel at least partly. The microelectrode has a band-shape or has a multitude of straight electrode sections connected to each other. The band-shape has a predetermined curvature or the straight electrode sections are arranged with predetermined different angles so that the field barrier has a predetermined curvature relative to the longitudinal extension of the channel.

Abstract: The invention provides a catalyzed soot filter formed on a wall flow substrate having internal walls coated with catalyst compositions. The soot filter maintains a homogeneous flow of the exhaust gases through the internal walls of the substrate along the length of the filter due to the coating design. Both the efficiency and the durability of the catalytic function are increased over conventionally designed catalyzed soot filters. The catalyzed soot filter provides an integrated function for simultaneously treating the gaseous components of the exhaust (e.g., CO and HC) and the particulate matter deposited in the filter.