Patents by Inventor Toru AJIKI
Toru AJIKI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240096629Abstract: A semiconductor device comprising a semiconductor substrate having upper and lower surfaces and a hydrogen containing region containing hydrogen and helium is provided. The carrier concentration distribution of the hydrogen containing region has: a first local maximum point; a second local maximum point closest to the first local maximum point among local maximum points positioned between the first local maximum point and the upper surface; a first intermediate point of the local minimum between the first and second local maximum points; and a second intermediate point closest to the second local maximum point among local minimum points or flat points where the carrier concentration remains constant positioned between the second local maximum point and the upper surface. A highest point of a helium concentration peak is positioned between the first and second local maximum points. The carrier concentration is lower at the first intermediate point than the second intermediate point.Type: ApplicationFiled: November 19, 2023Publication date: March 21, 2024Inventors: Yasunori AGATA, Takahiro TAMURA, Toru AJIKI
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Patent number: 11854782Abstract: A semiconductor device comprising a semiconductor substrate having upper and lower surfaces and a hydrogen containing region containing hydrogen and helium is provided. The carrier concentration distribution of the hydrogen containing region has: a first local maximum point; a second local maximum point closest to the first local maximum point among local maximum points positioned between the first local maximum point and the upper surface; a first intermediate point of the local minimum between the first and second local maximum points; and a second intermediate point closest to the second local maximum point among local minimum points or flat points where the carrier concentration remains constant positioned between the second local maximum point and the upper surface. A highest point of a helium concentration peak is positioned between the first and second local maximum points. The carrier concentration is lower at the first intermediate point than the second intermediate point.Type: GrantFiled: June 23, 2022Date of Patent: December 26, 2023Assignee: FUJI ELECTRIC CO., LTD.Inventors: Yasunori Agata, Takahiro Tamura, Toru Ajiki
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Patent number: 11810913Abstract: Provided is a semiconductor device, comprising: a semiconductor substrate; a transistor portion including an emitter region on the top of the semiconductor substrate; a diode portion including a cathode region on the bottom of the semiconductor substrate and a second conductivity type overlap region in a region other than the cathode region and arranged alongside to the transistor portion a preset arrangement direction on the top of the semiconductor substrate; and an interlayer dielectric film provided between the semiconductor substrate and an emitter electrode and including a contact hole for connecting the emitter electrode and the diode portion. The overlap region is provided to have a first length between the end of the emitter region and the end of the cathode region and a second length, which is shorter than the first length, between the end of the contact hole and the end of the cathode region.Type: GrantFiled: October 21, 2022Date of Patent: November 7, 2023Assignee: FUJI ELECTRIC CO., LTD.Inventors: Yosuke Sakurai, Seiji Noguchi, Toru Ajiki
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Publication number: 20230335599Abstract: A device includes a substrate with upper/lower surfaces, including hydrogen containing region having hydrogen chemical concentration peaks in a depth direction. A carrier concentration distribution of the hydrogen containing region includes a first carrier concentration peak, a second carrier concentration peak closest to the first carrier concentration peak, a third carrier concentration peak arranged closer to the upper surface than the second carrier concentration peak, a first inter peak region arranged between the first and second carrier concentration peaks, a second inter peak region arranged between the second and third carrier concentration peaks, and an inter-peaks concentration peak arranged in the second inter peak region such that the concentration peak does not overlap the hydrogen chemical concentration peaks in the second and third carrier concentration peaks. A local minimum value of a carrier concentration in the first inter peak region is smaller than that of the second inter peak region.Type: ApplicationFiled: June 13, 2023Publication date: October 19, 2023Inventors: Yoshiharu KATO, Toru AJIKI, Tohru SHIRAKAWA, Misaki TAKAHASHI, Kaname MITSUZUKA, Takashi YOSHIMURA, Yuichi ONOZAWA, Hiroshi TAKISHITA, Soichi YOSHIDA
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Patent number: 11715771Abstract: Provided is a semiconductor device comprising a semiconductor substrate, wherein the semiconductor substrate includes a hydrogen containing region including hydrogen, and the hydrogen containing region includes a high concentration region with a higher carrier concentration than a virtual carrier concentration determined based on a concentration of hydrogen included and an activation ratio of hydrogen. The semiconductor substrate includes an N type drift region, an N type emitter region that has a higher carrier concentration than that in the drift region, a P type base region, a P type collector region provided to be in contact with a lower surface of the semiconductor substrate, and an N type buffer region that is provided between the collector region and the drift region, and has a higher carrier concentration than that in the drift region, and the hydrogen containing region is included in the buffer region.Type: GrantFiled: October 22, 2020Date of Patent: August 1, 2023Assignee: FUJI ELECTRIC CO., LTD.Inventors: Yoshiharu Kato, Toru Ajiki, Tohru Shirakawa, Misaki Takahashi, Kaname Mitsuzuka, Takashi Yoshimura, Yuichi Onozawa, Hiroshi Takishita, Soichi Yoshida
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Publication number: 20230038105Abstract: Provided is a semiconductor device, comprising: a semiconductor substrate; a transistor portion including an emitter region on the top of the semiconductor substrate; a diode portion including a cathode region on the bottom of the semiconductor substrate and a second conductivity type overlap region in a region other than the cathode region and arranged alongside to the transistor portion a preset arrangement direction on the top of the semiconductor substrate; and an interlayer dielectric film provided between the semiconductor substrate and an emitter electrode and including a contact hole for connecting the emitter electrode and the diode portion. The overlap region is provided to have a first length between the end of the emitter region and the end of the cathode region and a second length, which is shorter than the first length, between the end of the contact hole and the end of the cathode region.Type: ApplicationFiled: October 21, 2022Publication date: February 9, 2023Inventors: Yosuke SAKURAI, Seiji NOGUCHI, Toru AJIKI
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Patent number: 11532738Abstract: Provided is a semiconductor device that includes a semiconductor substrate that is provided with a first conductivity type drift region, a transistor portion that includes a second conductivity type collector region in contact with a lower surface of the semiconductor substrate, and a diode portion that includes a first conductivity type cathode region in contact with the lower surface of the semiconductor substrate, and is alternately disposed with the transistor portion along an arrangement direction in an upper surface of the semiconductor substrate. In the transistor portions, a width in the arrangement direction of two or more transistor portions sequentially selected from the transistor portions nearer to the center in the arrangement direction of the semiconductor substrate is larger than a width in the arrangement direction of one of the other transistor portions.Type: GrantFiled: June 24, 2020Date of Patent: December 20, 2022Assignee: FUJI ELECTRIC CO., LTD.Inventors: Kouta Yokoyama, Toru Ajiki, Kaname Mitsuzuka, Tohru Shirakawa
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Patent number: 11488951Abstract: Provided is a semiconductor device, comprising: a semiconductor substrate; a transistor portion including an emitter region on the top of the semiconductor substrate; a diode portion including a cathode region on the bottom of the semiconductor substrate and a second conductivity type overlap region in a region other than the cathode region and arranged alongside to the transistor portion a preset arrangement direction on the top of the semiconductor substrate; and an interlayer dielectric film provided between the semiconductor substrate and an emitter electrode and including a contact hole for connecting the emitter electrode and the diode portion. The overlap region is provided to have a first length between the end of the emitter region and the end of the cathode region and a second length, which is shorter than the first length, between the end of the contact hole and the end of the cathode region.Type: GrantFiled: January 26, 2021Date of Patent: November 1, 2022Assignee: FUJI ELECTRIC CO., LTD.Inventors: Yosuke Sakurai, Seiji Noguchi, Toru Ajiki
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Publication number: 20220319852Abstract: A semiconductor device comprising a semiconductor substrate having upper and lower surfaces and a hydrogen containing region containing hydrogen and helium is provided. The carrier concentration distribution of the hydrogen containing region has: a first local maximum point; a second local maximum point closest to the first local maximum point among local maximum points positioned between the first local maximum point and the upper surface; a first intermediate point of the local minimum between the first and second local maximum points; and a second intermediate point closest to the second local maximum point among local minimum points or flat points where the carrier concentration remains constant positioned between the second local maximum point and the upper surface. A highest point of a helium concentration peak is positioned between the first and second local maximum points. The carrier concentration is lower at the first intermediate point than the second intermediate point.Type: ApplicationFiled: June 23, 2022Publication date: October 6, 2022Inventors: Yasunori AGATA, Takahiro TAMURA, Toru AJIKI
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Publication number: 20220278094Abstract: Provided is a semiconductor device including a semiconductor substrate including a transistor portion and a diode portion. The semiconductor substrate includes a drift region of a first conductivity type provided inside. The transistor portion includes: a transistor region separated from the diode portion in a top view of the semiconductor substrate; and a boundary region located between the transistor region and the diode portion in a top view of the semiconductor substrate and including a lifetime control region on a front surface side of the semiconductor substrate in the drift region. The boundary region has a current suppression structure.Type: ApplicationFiled: May 18, 2022Publication date: September 1, 2022Inventors: Kouta YOKOYAMA, Toru AJIKI, Tohru SHIRAKAWA
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Patent number: 11373869Abstract: A semiconductor device comprising a semiconductor substrate is provided, wherein the semiconductor substrate has a hydrogen containing region that contains hydrogen, the hydrogen containing region contains helium in at least some region, a hydrogen chemical concentration distribution of the hydrogen containing region in a depth direction has one or more hydrogen concentration trough portions, and in each of the hydrogen concentration trough portions the hydrogen chemical concentration is equal to or higher than 1/10 of an oxygen chemical concentration. In at least one of the hydrogen concentration trough portions, the hydrogen chemical concentration may be equal to or higher than a helium chemical concentration.Type: GrantFiled: October 26, 2020Date of Patent: June 28, 2022Assignee: FUJI ELECTRIC CO., LTD.Inventors: Yasunori Agata, Takahiro Tamura, Toru Ajiki
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Publication number: 20220084826Abstract: Provided is a semiconductor device comprising: a semiconductor substrate; a plurality of peaks of a doping concentration provided on a back surface of the semiconductor substrate; and a flat part, with a doping concentration more than or equal to 2.5 times a substrate concentration of the semiconductor substrate, provided between the plurality of peaks in a depth direction of the semiconductor substrate, wherein at least one of the plurality of peaks is a first peak provided on a front surface side relative to the flat part, wherein a doping concentration of the first peak is less than or equal to twice the doping concentration of the flat part.Type: ApplicationFiled: November 24, 2021Publication date: March 17, 2022Inventors: Yoshiharu KATO, Toru AJIKI, Takashi YOSHIMURA
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Publication number: 20220013368Abstract: Provided is a semiconductor device, including a semiconductor substrate having an upper surface and a lower surface and including a bulk donor, wherein a hydrogen chemical concentration distribution of the semiconductor substrate in a depth direction is flat, monotonically increasing, or monotonically decreasing from the lower surface to the upper surface except for a portion where a local hydrogen concentration peak is provided; and a donor concentration of the semiconductor substrate is higher than a bulk donor concentration over an entire region from the upper surface to the lower surface. Hydrogen ions may be irradiated from the upper surface or the lower surface of the semiconductor substrate so as to penetrate the semiconductor substrate in the depth direction.Type: ApplicationFiled: September 28, 2021Publication date: January 13, 2022Inventors: Yasunori AGATA, Takashi YOSHIMURA, Hiroshi TAKISHITA, Misaki UCHIDA, Michio NEMOTO, Toru AJIKI, Yuichi ONOZAWA
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Publication number: 20210359088Abstract: Provided is a semiconductor device, including: a drift region of a first conductivity type which is provided in a semiconductor substrate, and a buffer region of the first conductivity type which is provided between the drift region and a lower surface of the semiconductor substrate, and has three or more concentration peaks higher than a doping concentration of the drift region of the semiconductor substrate in a depth direction. Three or more of the concentration peaks includes a shallowest peak closest to the lower surface of the semiconductor substrate, a high concentration peak arranged at an upper side than the lower surface of the semiconductor substrate than the shallowest peak, and one or more low concentration peaks arranged at an upper side than the lower surface of the semiconductor substrate than the high concentration peak and of which the doping concentration is ? or less of the high concentration peak.Type: ApplicationFiled: July 27, 2021Publication date: November 18, 2021Inventors: Kota OHI, Yoshihiro IKURA, Yosuke SAKURAI, Mutsumi KITAMURA, Yuichi ONOZAWA, Yoshiharu KATO, Toru AJIKI
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Publication number: 20210151430Abstract: Provided is a semiconductor device, comprising: a semiconductor substrate; a transistor portion including an emitter region on the top of the semiconductor substrate; a diode portion including a cathode region on the bottom of the semiconductor substrate and a second conductivity type overlap region in a region other than the cathode region and arranged alongside to the transistor portion a preset arrangement direction on the top of the semiconductor substrate; and an interlayer dielectric film provided between the semiconductor substrate and an emitter electrode and including a contact hole for connecting the emitter electrode and the diode portion. The overlap region is provided to have a first length between the end of the emitter region and the end of the cathode region and a second length, which is shorter than the first length, between the end of the contact hole and the end of the cathode region.Type: ApplicationFiled: January 26, 2021Publication date: May 20, 2021Inventors: Yosuke SAKURAI, Seiji NOGUCHI, Toru AJIKI
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Publication number: 20210050215Abstract: A semiconductor device comprising a semiconductor substrate is provided, wherein the semiconductor substrate has a hydrogen containing region that contains hydrogen, the hydrogen containing region contains helium in at least some region, a hydrogen chemical concentration distribution of the hydrogen containing region in a depth direction has one or more hydrogen concentration trough portions, and in each of the hydrogen concentration trough portions the hydrogen chemical concentration is equal to or higher than 1/10 of an oxygen chemical concentration. In at least one of the hydrogen concentration trough portions, the hydrogen chemical concentration may be equal to or higher than a helium chemical concentration.Type: ApplicationFiled: October 26, 2020Publication date: February 18, 2021Inventors: Yasunori AGATA, Takahiro TAMURA, Toru AJIKI
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Publication number: 20210043739Abstract: Provided is a semiconductor device comprising a semiconductor substrate, wherein the semiconductor substrate includes a hydrogen containing region including hydrogen, and the hydrogen containing region includes a high concentration region with a higher carrier concentration than a virtual carrier concentration determined based on a concentration of hydrogen included and an activation ratio of hydrogen. The semiconductor substrate includes an N type drift region, an N type emitter region that has a higher carrier concentration than that in the drift region, a P type base region, a P type collector region provided to be in contact with a lower surface of the semiconductor substrate, and an N type buffer region that is provided between the collector region and the drift region, and has a higher carrier concentration than that in the drift region, and the hydrogen containing region is included in the buffer region.Type: ApplicationFiled: October 22, 2020Publication date: February 11, 2021Inventors: Yoshiharu KATO, Toru AJIKI, Tohru SHIRAKAWA, Misaki TAKAHASHI, Kaname MITSUZUKA, Takashi YOSHIMURA, Yuichi ONOZAWA, Hiroshi TAKISHITA, Soichi YOSHIDA
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Publication number: 20210043758Abstract: Provided is a semiconductor device that includes a semiconductor substrate that is provided with a first conductivity type drift region, a transistor portion that includes a second conductivity type collector region in contact with a lower surface of the semiconductor substrate, and a diode portion that includes a first conductivity type cathode region in contact with the lower surface of the semiconductor substrate, and is alternately disposed with the transistor portion along an arrangement direction in an upper surface of the semiconductor substrate. In the transistor portions, a width in the arrangement direction of two or more transistor portions sequentially selected from the transistor portions nearer to the center in the arrangement direction of the semiconductor substrate is larger than a width in the arrangement direction of one of the other transistor portions.Type: ApplicationFiled: June 24, 2020Publication date: February 11, 2021Inventors: Kouta YOKOYAMA, Toru AJIKI, Kaname MITSUZUKA, Tohru SHIRAKAWA
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Publication number: 20200335497Abstract: A semiconductor device includes a transistor portion which includes a plurality of gate structure portions, and a diode portion which includes a cathode region in a lower surface of a semiconductor substrate. Each of the gate structure portions includes a gate trench portion, an emitter region of a first conductive type which is provided between an upper surface of the semiconductor substrate and a drift region to abut on the gate trench portion, and a base region of a second conductive type which is provided between the emitter region and the drift region to abut on the gate trench portion. A first threshold of the gate structure portion with a shortest distance to the cathode region in a top view is lower than a second threshold of the gate structure portion with a longest distance to the cathode region by 0.1 V or more and 1 V or less.Type: ApplicationFiled: February 18, 2020Publication date: October 22, 2020Inventors: Kaname MITSUZUKA, Tohru SHIRAKAWA, Toru AJIKI, Yuichi ONOZAWA