Abstract: Provided is a control device controlling an electromagnetic actuator that drives an operation device, supported in an elastically vibratable manner by an elastic support part, in one direction of a vibration direction of the operation device to vibrate the operation device. The control device includes a circuit that applies a main driving signal to a coil of the electromagnetic actuator to start vibration of the operation device in response to a touch operation on the operation device, then applies a sub-driving signal to the coil to adjust an attenuation period of the vibration. The sub-driving signal has a variable voltage varying with an offset voltage, as a center value, offset from a zero voltage, and a waveform that indicates a variation in the variable voltage is a sine function curve or a cosine function curve.

Abstract: Provided is a control device controlling an electromagnetic actuator that drives an operation device, supported in an elastically vibratable manner by an elastic support part, in one direction of a vibration direction of the operation device to vibrate. The control device includes a circuit that applies a main driving signal to a coil of the electromagnetic actuator to start vibration of the operation device in response to a touch operation on the operation device, then applies a sub-driving signal to the coil to adjust an attenuation period of the vibration. The sub-driving signal has a variable voltage varying with an offset voltage, as a center value, offset from a zero voltage, and a waveform that indicates a variation in the variable voltage is a sine function curve or a cosine function curve. The circuit applies the sub-driving signal while changing the offset voltage for each cycle.

Abstract: Various embodiments of the present technology comprise a method and apparatus for a class-D amplifier. In various embodiments, the class-D amplifier operates to control an output signal during a start-up state to suppress a pop noise (start-up noise) without the need for a mute switch. The class-D amplifier may utilize a transition signal during the start-up state to prime or otherwise stabilize the output signal to suppress the pop noise.

Abstract: In one form, a spread spectrum clock generator includes a clock generator and a modulator. The clock generator modulates a frequency of a reference clock signal using a modulation signal to provide a spread spectrum clock signal. The clock generator has a characteristic transfer function that varies with values of a parameter. The modulator generates the modulation signal according to a desired profile conditioned by an inverse of the characteristic transfer function of the clock generator at a current value of the parameter.

Abstract: In one form, a spread spectrum clock generator includes a clock generator and a modulator. The clock generator modulates a frequency of a reference clock signal using a modulation signal to provide a spread spectrum clock signal. The clock generator has a characteristic transfer function. The modulator generates the modulation signal according to a desired profile conditioned by an inverse of the characteristic transfer function of the clock generator.

Abstract: In one form, a spread spectrum clock generator includes a clock generator and a modulator. The clock generator modulates a frequency of a reference clock signal using a modulation signal to provide a spread spectrum clock signal. The clock generator has a characteristic transfer function that varies with values of a parameter. The modulator generates the modulation signal according to a desired profile conditioned by an inverse of the characteristic transfer function of the clock generator at a current value of the parameter.

Abstract: A semiconductor device (npn bipolar transistor) includes an n-type collector layer, a base layer constituted by a p+ diffusion layer, a SiGe layer and a p-type silicon film, an n-type emitter layer and a charge transport prevention film formed between the n-type collector layer and the n-type emitter layer and having an effect as a potential barrier with respect to either electrons or holes.

Abstract: In an ADPLL circuit, on the basis of a gain of a digitally controlled oscillator estimated when a loop gain of a certain value is set in the loop filter and on the basis of a device parameter of the digitally controlled oscillator, the DCO gain estimation unit estimates a gain of the digitally controlled oscillator when a loop gain of another value is set in the loop filter.

Abstract: The present invention quickly detects an offset and prevents cutoff of low frequency signals. Offset detection circuits smooth an output of a variable gain amplifier at a predetermined time constant and detects the offset, which is a DC component. The detected offset is added to the input of the variable gain amplifier by an adder and the offset in the output of the variable gain amplifier is corrected. The time constant in the offset detection circuit is changed by the resistance values of the variable resistors. Then, the time constant is changed to a small time constant when the gain of the variable gain amplifier is changed and thereafter to a large time constant.

Abstract: The present invention quickly detects an offset and prevents cutoff of low frequency signals. Offset detection circuits smooth an output of a variable gain amplifier at a predetermined time constant and detects the offset, which is a DC component. The detected offset is added to the input of the variable gain amplifier by an adder and the offset in the output of the variable gain amplifier is corrected. The time constant in the offset detection circuit is changed by the resistance values of the variable resistors. Then, the time constant is changed to a small time constant when the gain of the variable gain amplifier is changed and thereafter to a large time constant.

Abstract: A capacitor array circuit receives a plurality of input signals, generate a single output signal by combining the plurality of input signals, and output the single output signal. A comparator receives the output signal of the capacitor array circuit. A current source, which is disposed between a predetermined fixed voltage source and an output terminal of the switched-capacitor circuit, supplies the current to the output terminal until the output signal of the comparator changes. A plurality of input capacitors in the capacitor array circuit receives a plurality of input signals in parallel with each other. At least one additional regulating capacitor in the capacitor array circuit store the charge to compensate for an offset component caused by the delay in the comparator. The respective output terminals of the plurality of input capacitors and the at least one additional regulating capacitor are combined into one.

Abstract: In an ADPLL circuit, on the basis of a gain of a digitally controlled oscillator estimated when a loop gain of a certain value is set in the loop filter and on the basis of a device parameter of the digitally controlled oscillator, the DCO gain estimation unit estimates a gain of the digitally controlled oscillator when a loop gain of another value is set in the loop filter.

Abstract: A capacitor array circuit receives a plurality of input signals, generate a single output signal by combining the plurality of input signals, and output the single output signal. A comparator receives the output signal of the capacitor array circuit. A current source, which is disposed between a predetermined fixed voltage source and an output terminal of the switched-capacitor circuit, supplies the current to the output terminal until the output signal of the comparator changes. A plurality of input capacitors in the capacitor array circuit receives a plurality of input signals in parallel with each other. At least one additional regulating capacitor in the capacitor array circuit store the charge to compensate for an offset component caused by the delay in the comparator. The respective output terminals of the plurality of input capacitors and the at least one additional regulating capacitor are combined into one.

Abstract: A first transistor includes: a first terminal that receives one of differential input signals; a second terminal that receives a control signal for varying an impedance; a third terminal connected to the second transistor; and a fourth terminal that supplies a potential to a substrate. A second transistor includes: a fifth terminal that receives the other of the differential input signals; a sixth terminal that receives a control signal, the seventh terminal connected to the first transistor, and the eighth terminal that supplies a potential to a substrate. The third terminal, the fourth terminal, the seventh terminal, and the eighth terminal are connected together.

Abstract: A memory capable of suppressing disturbance causing disappearance of data in a nonselected memory cell is provided. This memory comprises a memory cell array including a bit line, a word line arranged to intersect with the bit line and memory cells connected between the bit line and the word line, for accessing a selected memory cell thereby deteriorating a remanent polarization in an arbitrary memory cell and thereafter performing recovery for recovering all memory cells to remanent polarizations immediately after a write operation or remanent polarizations subjected to single application of a voltage applied to a nonselected memory cell in the access.

Abstract: A semiconductor device (npn bipolar transistor) includes an n-type collector layer, a base layer constituted by a p+ diffusion layer, a SiGe layer and a p-type silicon film, an n-type emitter layer and a charge transport prevention film formed between the n-type collector layer and the n-type emitter layer and having an effect as a potential barrier with respect to either electrons or holes

Abstract: A semiconductor device include an emitter layer, an emitter electrode containing a metal-semiconductor compound of a metal and a semiconductor, formed on a surface of the emitter layer, and a first reaction suppression layer formed between the emitter layer and the emitter electrode and suppressing permeation of the metal diffused from the emitter electrode.

Abstract: A method of fabricating a semiconductor device capable of improving reliability of a gate insulator film is obtained. This method of fabricating a semiconductor device comprises a step of forming a gate insulator film on the main surface of a semiconductor layer by heat treatment, and the step of forming the gate insulator film includes a step of performing the heat treatment in an atmosphere containing oxidizing gas at a temperature exceeding the temperature causing viscous flow of the gate insulator film thereby forming the gate insulator film on the main surface of the semiconductor layer.

Abstract: A memory capable of suppressing disturbance causing disappearance of data in a nonselected memory cell is provided. This memory comprises a memory cell array including a bit line, a word line arranged to intersect with the bit line and memory cells connected between the bit line and the word line, for accessing a selected memory cell thereby deteriorating a remanent polarization in an arbitrary memory cell and thereafter performing recovery for recovering all memory cells to remanent polarizations immediately after a write operation or remanent polarizations subjected to single application of a voltage applied to a nonselected memory cell in the access.

Abstract: A method of fabricating a semiconductor device capable of improving reliability of a gate insulator film is obtained. This method of fabricating a semiconductor device comprises a step of forming a gate insulator film on the main surface of a semiconductor layer by heat treatment, and the step of forming the gate insulator film includes a step of performing the heat treatment in an atmosphere containing oxidizing gas at a temperature exceeding the temperature causing viscous flow of the gate insulator film thereby forming the gate insulator film on the main surface of the semiconductor layer.